Thin Film Transistor Dual-Layer Insulating Laminate

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Solution Overview

Problem

Existing thin film transistors (TFTs) suffer from inferior electrical characteristics, including high off-state current, large sub-threshold swing factor, and low mobility, which hinder their ability to meet the requirements for high display quality in flat panel display devices.

Innovation Solution

A dual-layer insulating laminate is introduced, comprising a silicon oxynitride layer and a tetraethyl orthosilicate layer, each with a thickness between 2nm and 4nm, formed using chemical vapor deposition, to enhance the interface properties and repair interface state defects in the semiconductor layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single-layer insulating layer is used, then the device complexity is low, but the electrical characteristics are inferior with high off-state current and low mobility

Engineering Contradiction:
Improveelectrical characteristicsVSAvoidinsulating layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The single-layer insulating layer is segmented into a dual-layer structure consisting of a first insulating layer (SiO2) and a second insulating layer (SiNx). This segmentation allows each layer to perform different functions: the SiO2 layer provides a clean interface with the semiconductor layer for high mobility, while the SiNx layer provides excellent insulation properties for low off-state current, thereby resolving the contradiction between device simplicity and electrical performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs composite materials by combining two different insulating materials (SiO2 and SiNx) in a layered structure. Each material contributes its superior properties to the overall interface, creating a composite interface structure that achieves both low off-state current and high mobility, overcoming the limitations of single-material insulating layers.

Inventive Principle:
Principle #40Composite materials

2Reliability

If the insulating layer thickness is increased to improve insulation, then the off-state current is reduced, but the interface quality and electron transfer performance deteriorate

Engineering Contradiction:
Improveoff-state currentVSAvoidinterface quality
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The total insulating layer thickness is segmented between two layers, with the SiO2 layer in direct contact with the semiconductor layer maintaining a thin thickness (5-20nm) to ensure high interface quality and electron transfer performance, while the SiNx layer provides the additional thickness (20-50nm) needed for excellent insulation and low off-state current. This segmentation resolves the contradiction between thickness for insulation and thinness for interface quality.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The dual-layer insulating laminate significantly reduces off-state current, improves mobility, and decreases the sub-threshold swing factor, resulting in enhanced electrical characteristics of the TFTs.

Implementation Method 1

formed using chemical vapor deposition

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentEP3340309B1Thin film transistor and manufacturing method thereof
Publication Date: 2021.01.27 KUNSHAN NEW FLAT PANEL DISPLAY TECHNOLOGY CENTER CO LTD
  • EP3340309B1 patent drawingFigure 1~3
  • EP3340309B1 patent drawingFigure 4~5
  • EP3340309B1 patent drawingFigure 6~7

AI summary

A thin film transistor (TFT) and a method of manufacturing the TFT are disclosed. The TFT (200) includes: a gate (21) formed on a substrate (20); an insulating laminate (23) formed on the gate (21); a semiconductor layer (25) formed on the insulating laminate (23); and a source (27) and a drain (29) formed on the semiconductor layer (25), the source (27) and the drain (29) being located at and connected to opposing lateral edges of the semiconductor layer (25). The insulating laminate (23) includes a first insulating layer (231) and a second insulating layer (232), the second insulating layer (232) being located between the first insulating layer (231) and the semiconductor layer (25). The dual-layer insulating laminate enables improvements in the performance of the TFT by enhancing the interface properties and repairing interface state defects in the semiconductor layer.