Thin Film Transistor Electrode Layout for Low OFF Current
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Solution Overview
Problem
The complexity of thin film transistor structures in display devices, particularly the need for electric field attenuation regions, leads to increased manufacturing time and complexity, regardless of whether the attenuation region is formed in-plane or vertically, as both require specific semiconductor layer configurations and masking steps.
Innovation Solution
A display device with thin film transistors where the drain and source electrodes are positioned such that they do not overlap with the gate electrode, allowing for a simpler structure by creating a high resistance region between the electrodes, thus preventing electric field concentration without the need for additional masking steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an electric field attenuation region is formed between the channel region and the drain electrode as well as between the channel region and the source electrode, then the OFF current is reduced, but the manufacturing complexity increases due to required masking steps
Solution Approach 1:
The invention merges the electric field attenuation region formation into the existing low impurity concentration region of the semiconductor layer. By positioning the drain and source electrodes such that they do not overlap with the gate electrode, the attenuation function is achieved through the inherent low impurity concentration region without requiring separate masking steps or additional processing complexity.
2Reliability
If the electric field attenuation region is formed vertically overlapping with the drain and source electrodes, then the OFF current is reduced, but additional semiconductor layer formation is required increasing manufacturing time
Solution Approach 1:
The low impurity concentration region of the semiconductor layer serves multiple functions: it acts as the channel region for transistor operation and simultaneously functions as the electric field attenuation region. This multi-functionality eliminates the need for separate semiconductor layer formation for attenuation purposes, reducing manufacturing time while maintaining reliability.
3Ease of manufacture
If the drain and source electrodes are positioned to overlap with the gate electrode, then the manufacturing process is simpler, but electric field concentration occurs increasing OFF current
Solution Approach 1:
The invention applies local quality by creating a specific spatial arrangement where the drain and source electrodes are positioned to not overlap with the gate electrode in plan view. This local geometric modification creates a high resistance region at critical locations, preventing electric field concentration and reducing OFF current, while maintaining overall manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the OFF current and simplifies the manufacturing process by eliminating the need for complex electric field attenuation region formation, enhancing the reliability of the thin film transistors as switching elements while maintaining low impurity concentration.
Implementation Method 1
a semiconductor layer which is formed astride the gate electrode by way of an insulation film... a high resistance region between the electrodes, thus preventing electric field concentration
Implementation Method 2
preventing electric field concentration without the need for additional masking steps
Data Source
AI summary
The present invention provides a display device having thin film transistors which can reduce an OFF current in spite of the extremely simple constitution. In the display device having thin film transistors on a substrate, each thin film transistor includes a gate electrode which is connected with a gate signal line, a semiconductor layer which is formed astride the gate electrode by way of an insulation film, a drain electrode which is connected with a drain signal line and is formed on the semiconductor layer, and a source electrode which is formed on the semiconductor layer in a state that the source electrode faces the drain electrode in an opposed manner, and a side of the drain electrode which faces the source electrode does not overlap the gate electrode as viewed in a plan view, and a side of the source electrode which faces the drain electrode does not overlap the gate electrode as viewed in a plan view.