Thin Film Transistor Gate Capacitance Compensation
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Solution Overview
Problem
Current TFT array fabrication processes lead to nonconformity in gate-drain parasitic capacitances and resulting uneven feed-through voltages, causing inconsistent display brightness due to exposure process errors.
Innovation Solution
A TFT design with a gate featuring a control part, connection part, and capacitance compensation part, where the sum of first and second parasitic capacitances is constant, ensuring consistent feed-through voltages across all pixel regions, and a repairing method to address electrostatic damage and alignment errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional exposure processes are used to fabricate TFT arrays, then production efficiency is maintained, but gate-drain parasitic capacitances become nonconformant due to displacement errors, causing uneven feed-through voltages and inconsistent display brightness
Solution Approach 1:
The gate is divided into multiple gate electrodes (first gate electrode, second gate electrode, third gate electrode) with distinct functions. The first and second gate electrodes form the control part, while the third gate electrode forms the capacitance compensation part. This segmentation allows independent optimization of control and capacitance compensation functions, resolving the contradiction by making the gate structure modular and functionally differentiated.
Solution Approach 2:
Different regions of the gate structure are assigned different functions: the control part (first and second gate electrodes) controls the channel, while the capacitance compensation part (third gate electrode) specifically compensates for parasitic capacitance variations. This local differentiation allows each region to be optimized for its specific purpose, improving overall parasitic capacitance consistency without requiring complete redesign of the entire gate.
2Reliability
If the gate structure is designed with capacitance compensation parts to improve parasitic capacitance consistency, then feed-through voltage uniformity improves, but the gate structure becomes more complex
Solution Approach 1:
The capacitance compensation function is merged into the existing gate structure by adding a third gate electrode that overlaps with the drain electrode. This integration allows parasitic capacitance compensation to be achieved within the gate structure itself, rather than requiring separate external compensation circuits, thus improving reliability while limiting the increase in overall device complexity.
Solution Approach 2:
The gate structure serves multiple functions: the first and second gate electrodes provide control functionality, while the third gate electrode provides capacitance compensation. The overlapping region between the third gate electrode and drain electrode creates a parasitic capacitance that compensates for variations in other regions, making the gate structure universally functional for both control and compensation purposes.
3Manufacturing precision
If additional exposure processes are implemented to correct alignment errors, then parasitic capacitance consistency improves, but manufacturing time and cost increase
Solution Approach 1:
The capacitance compensation part of the gate is designed in advance to compensate for expected parasitic capacitance variations. By pre-configuring the third gate electrode to overlap with the drain electrode in a controlled manner, the design anticipates and compensates for alignment variations that would otherwise require corrective exposure processes, thus improving precision without adding manufacturing steps.
Solution Approach 2:
The capacitance compensation part of the gate structure serves itself by using its own geometry and positioning to compensate for parasitic capacitance variations. The third gate electrode's overlapping region with the drain electrode automatically adjusts the total parasitic capacitance, making the structure self-compensating without requiring external correction processes or additional manufacturing interventions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The TFT array achieves consistent feed-through voltages and improved display brightness by maintaining constant parasitic capacitance sums, reducing bright spots and enhancing display quality without additional exposure processes.
Implementation Method 1
Since the gate G and the drain D of the TFT 116 are partially overlapped, the overlapping region produces a gate-drain parasitic capacitor Cgd
Implementation Method 2
the overlapping region produces a gate-drain parasitic capacitor Cgd
Data Source
AI summary
A thin film transistor (TFT) including a gate, a semiconductor layer, a source and a drain is provided. The gate has a control part, a connection part and a capacitance compensation part. The connection part is disposed between the control part and the capacitance compensation part for joining the two parts together. The semiconductor layer is disposed over the gate, the source and the drain are disposed on the semiconductor layer. An end of the drain overlaps the control part of the gate with a first region for composing a first parasitic capacitance; while another end of the drain overlaps the capacitance compensation part of the gate with a second region for composing a second parasitic capacitance. In a TFT array with the TFT, the sum of the first parasitic capacitance and the second parasitic capacitance is a constant.