Thin Film Transistor Grain Boundary Control via Metal Catalyst
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing thin film transistor and organic light emitting diode display technologies face challenges in controlling metal silicide formation and grain boundary orientation, leading to suboptimal semiconductor layer characteristics and performance.
Innovation Solution
A method involving a protection layer pattern on an amorphous silicon layer, using a metal catalyst to crystallize the layer and control the formation of low and high angle grain boundaries, ensuring the channel region has only low angle grain boundaries aligned with current flow, while high angle grain boundaries are positioned outside, thereby improving semiconductor layer quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a metal catalyst is used to crystallize the amorphous silicon layer, then the polysilicon layer can be formed with controlled grain boundaries, but metal silicide may form and contaminate the channel region, degrading device performance
Solution Approach 1:
The patent divides the substrate into different regions with distinct functions: a first region for forming metal silicide as crystal seeds, a second region (channel region) protected from metal silicide formation, and a third region for high angle grain boundary formation. This spatial segmentation allows controlled grain boundary orientation while preventing metal contamination in the channel region through selective area treatment.
Solution Approach 2:
Different regions of the semiconductor layer are given different local characteristics: the channel region is engineered to have only low angle grain boundaries extending in the current flow direction for optimal electrical properties, while other regions can contain high angle grain boundaries or metal silicide. This local differentiation optimizes performance in critical areas without compromising overall manufacturability.
2Productivity
If high angle grain boundaries are present in the channel region, then crystal growth can be achieved, but device characteristics deteriorate due to increased leakage current and reduced mobility
Solution Approach 1:
The patent applies different grain boundary characteristics to different regions: low angle grain boundaries are formed in the channel region to maintain high carrier mobility and low leakage current, while high angle grain boundaries are intentionally formed in non-channel regions where they do not affect device performance. This allows efficient crystal growth overall while protecting critical areas.
Solution Approach 2:
The substrate is segmented into regions where crystal growth conditions are optimized for productivity in non-channel areas, while channel regions are protected to maintain reliability. The metal catalyst distribution and annealing process are designed to produce this segmented grain boundary structure.
3Ease of manufacture
If conventional crystallization methods are used, then manufacturing process is simpler, but expensive laser annealing or metal contamination is required to achieve acceptable grain boundary control
Solution Approach 1:
The patent uses a segmented metal catalyst layer deposited at different locations and concentrations to control crystal growth. By placing metal catalyst in specific patterns (higher concentration at edges, lower in center), the process achieves precise grain boundary orientation control through conventional annealing without requiring expensive laser equipment or complex additional processing steps.
Solution Approach 2:
The patent controls grain boundary characteristics by changing parameters of the metal catalyst layer (concentration, distribution pattern, thickness) and annealing conditions. This allows precise control of grain boundary orientation and type through parameter optimization rather than complex process equipment, maintaining ease of manufacture while achieving high manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the characteristics of the thin film transistor and organic light emitting diode display devices by reducing leakage current and improving overall performance without the need for expensive laser annealing or metal contamination.
Implementation Method 1
crystallizing the amorphous silicon layer to form a preliminary polysilicon layer
Implementation Method 2
crystallizing the amorphous silicon layer to form a preliminary polysilicon layer using the metal silicide as a seed
Data Source
AI summary
A thin film transistor includes a substrate, a buffer layer on the substrate, a semiconductor layer including source/drain regions and a channel region on the buffer layer, a gate insulating layer corresponding to the channel region, a gate electrode corresponding to the channel region, and source/drain electrodes electrically connected to the semiconductor layer. A polysilicon layer of the channel region may include only a low angle grain boundary, and a high angle grain boundary may be disposed in a region of the semiconductor layer that is apart from the channel region.