Thin Film Transistor Fabrication via Refractive Capping Layer
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Solution Overview
Problem
Existing methods for fabricating thin film transistors, such as solid phase crystallization, excimer laser crystallization, metal induced crystallization, and metal induced lateral crystallization, face issues like substrate deformation, high costs, surface protrusions, and increased leakage current due to residual metal catalysts.
Innovation Solution
A method involving the formation of a capping layer with a refraction index of 1.78 to 1.90 using a silicon nitride film, followed by a metal catalyst layer, to crystallize an amorphous silicon layer into a polycrystalline silicon layer with controlled grain size and reduced residual metal catalysts, thereby improving transistor characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If metal induced crystallization method is used to crystallize amorphous silicon layer, then crystallization efficiency is improved, but residual metal catalyst increases causing increased leakage current
Solution Approach 1:
A capping layer is introduced as an intermediary between the metal catalyst layer and the amorphous silicon layer. This capping layer prevents direct contact between metal catalyst and silicon, enabling crystallization to proceed while minimizing metal contamination in the final polycrystalline silicon layer, thus reducing leakage current while maintaining crystallization efficiency
Solution Approach 2:
The structure is segmented into multiple distinct layers: substrate, amorphous silicon layer, capping layer, and metal catalyst layer. This segmentation allows each layer to perform its specific function independently - the capping layer acts as a barrier that separates the metal catalyst from the silicon, enabling efficient crystallization while preventing harmful metal contamination
2Stability of the object's composition
If solid phase crystallization method is used to crystallize amorphous silicon layer, then substrate deformation is avoided, but process time increases significantly
Solution Approach 1:
The capping layer is formed in advance before the crystallization process. This preliminary action prepares the interface between metal catalyst and silicon, enabling faster crystallization kinetics without requiring high temperatures that would deform the substrate, thus reducing process time while maintaining substrate stability
Solution Approach 2:
The introduction of the capping layer changes the physical and chemical parameters at the metal-silicon interface, facilitating faster crystal growth kinetics. This allows crystallization to proceed more rapidly at lower temperatures, reducing process time while avoiding substrate deformation
3Speed
If excimer laser crystallization method is used to crystallize amorphous silicon layer, then crystallization speed is improved, but equipment cost increases and surface protrusions occur
Solution Approach 1:
The capping layer serves as an intermediary that enables efficient heat and mass transfer during crystallization, achieving fast crystallization speeds similar to laser methods but using simpler, more cost-effective thermal processing equipment without causing surface protrusions
Solution Approach 2:
The invention replaces the complex mechanical laser system with a simpler thermal field approach. The capping layer facilitates crystallization through controlled thermal processing, substituting expensive laser equipment with conventional heating methods while achieving comparable crystallization speeds without surface defects
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances electron mobility, reduces leakage current, and achieves a polycrystalline silicon layer with desired grain size and uniformity by controlling the refraction index of the capping layer, resulting in superior transistor performance.
Implementation Method 1
forming a capping layer formed of nitride film having 1.78 to 1.90 of the refraction index when crystallizing the amorphous silicon layer
Implementation Method 2
crystallizing the amorphous silicon layer into a polycrystalline silicon layer by heat treating the substrate
Implementation Method 3
heat treating thereby crystallizing the metal catalyst layer
Data Source
AI summary
The present invention relates to a method for fabricating thin film transistor, more particularly, to a method for fabricating thin film transistor which not only manufactures a polycrystalline silicon layer having large grain size and containing a trace of residual metal catalyst by heat treating thereby crystallizing the metal catalyst layer after forming an amorphous silicon layer on a substrate, forming a capping layer formed of nitride film having 1.78 to 1.90 of the refraction index when crystallizing the amorphous silicon layer and forming a metal catalyst layer on the capping layer, but also controls characteristics of the polycrystalline silicon layer by controlling the refraction index of the capping layer.