Thin Film Transistor Silicon-Oxide Polymer Transition Layer
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Solution Overview
Problem
Existing thin film transistors are affected by water molecules, hydroxyl free radicals, and oxygen free radicals at the interface between the insulation layer and the semiconductor layer, leading to reduced on/off ratio and electron mobility, compromising their stability.
Innovation Solution
A thin film transistor design incorporating a carbon nanotube semiconductor layer with a silicon-oxide cross-linked polymer transition layer, which forms a firm contact with both the insulating and semiconductor layers, enhancing the interface state and improving current on/off ratio and electron mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional thin film transistor structure is used, then the device can perform basic switching operation, but the on/off ratio and electron mobility are reduced due to interfacial contaminants
Solution Approach 1:
The patent introduces an insulating layer positioned between the gate electrode and the semiconductor layer to act as an intermediary that prevents harmful interfacial contaminants from forming or accumulating at the critical interface. This mediator layer isolates the two functional layers while maintaining electrical insulation, thereby eliminating the harmful effects of water molecules, hydroxyl free radicals, and oxygen free radicals that would otherwise degrade device performance.
Solution Approach 2:
The patent employs a composite structure consisting of multiple layers with distinct functions: a gate electrode layer, an insulating layer (such as silicon oxide, silicon nitride, or silicon oxynitride), and a semiconductor layer (such as amorphous silicon, polycrystalline silicon, or organic semiconductor). This composite material architecture allows each layer to contribute its specific properties, creating a stable interface that resists contamination while maintaining effective switching operation.
2Ease of manufacture
If the interface between insulation layer and semiconductor layer is exposed to contaminants, then device fabrication is simplified, but electron mobility and on/off ratio deteriorate
Solution Approach 1:
The insulating layer is formed on the gate electrode surface before depositing the semiconductor layer, creating a pre-prepared interface that is resistant to contamination. This preliminary protective layer ensures that when subsequent layers are deposited or when the device is exposed to ambient conditions during fabrication, the critical interface remains clean and stable, thereby maintaining high interface quality without complicating the overall fabrication process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The carbon nanotube-based thin film transistor with a silicon-oxide cross-linked polymer transition layer achieves high on/off ratio and electron mobility, addressing the stability issues caused by interfacial contaminants.
Implementation Method 1
a transition layer which is sandwiched between the semiconductor layer and the insulating layer
Implementation Method 2
The thin film transistor performs a switching operation by modulating an amount of carriers accumulated in an interface between the insulation layer and the semiconductor layer from an accumulation state to a depletion state, with applied voltage to the gate electrode
Data Source
AI summary
A thin film transistor is provided. The thin film transistor includes a source electrode, a drain electrode, a semiconducting layer, a transition layer, an insulating layer and a gate electrode. The drain electrode is spaced apart from the source electrode. The gate electrode is insulated from the source electrode, the drain electrode, and the semiconductor layer by the insulating layer. The transition layer is sandwiched between the insulating layer and the semiconductor layer. The transition layer is a silicon-oxide cross-linked polymer layer including a plurality of Si atoms. The plurality of Si atoms is bonded with atoms of the insulating layer and atoms of the semiconductor layer.