Thin Film Transistor Substrate with Cruciform Alignment Mark
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Solution Overview
Problem
Existing thin film transistor substrates face inefficiencies in using glass substrate area and yield rate due to alignment mark placement, with external marks requiring unused space and internal marks potentially causing positional errors and line deterioration.
Innovation Solution
A thin film transistor substrate design incorporating a first metal line with a cruciform shape as an alignment mark within the display region, allowing for efficient substrate use and accurate alignment without additional patterns, and a method of manufacturing that utilizes these marks for precise alignment during exposure steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If alignment marks are formed outside the display region, then alignment accuracy is improved, but glass substrate area utilization deteriorates
Solution Approach 1:
The patent merges the alignment mark function with the gate line structure by forming a cutout in the gate line. This integration allows the alignment mark to be positioned within the display region while maintaining alignment accuracy, thereby improving glass substrate area utilization without sacrificing measurement precision.
2Area of stationary object
If independent alignment mark patterns are formed within the display region, then glass substrate area utilization is improved, but yield rate deteriorates due to line deterioration
Solution Approach 1:
The alignment mark is merged with the gate line structure through a cutout formation, eliminating the need for separate independent alignment mark patterns. This integration reduces the total number of patterns that could cause line deterioration, thereby improving yield rate while maintaining area utilization benefits.
3Adaptability or versatility
If multiple alignment marks are superposed for alignment, then alignment flexibility is improved, but detection accuracy deteriorates due to positional displacement errors
Solution Approach 1:
The patent extracts the alignment function from multiple superposed marks and concentrates it into a single cutout structure formed in the gate line. This simplification eliminates the problem of positional displacement errors between multiple marks while maintaining alignment flexibility through the cutout's geometric features.
Data Source
AI summary
In a portion of a gate signal line and a portion of a common signal line, cutouts which are arranged perpendicular to the extending direction of these lines and open to face each other in an opposed manner are formed. A cruciform shape in appearance is formed by combining a gap defined between the gate signal line and the common signal line extending parallel to each other and the cutouts to each other. The cruciform portion formed in this manner is used as an alignment mark in the exposure of a photolithography step of a layer formed later. Due to such a constitution, in manufacturing a thin film transistor substrate, it is possible to realize the highly accurate alignment without forming a pattern only used for alignment.