Thickened Word Lines in 3D Memory Terrace Regions
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in efficiently forming thickened word lines in terrace regions, which affects the structural integrity and performance of memory stack structures.
Innovation Solution
A method involving the formation of an alternating stack of insulating and sacrificial material layers over a substrate, where sacrificial material layers have a decreasing lateral extent with vertical distance, allowing for self-aligned material growth and subsequent replacement with conductive layers to create thickened word lines in the terrace region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional uniform word line thickness is used throughout the device, then manufacturing process is simpler, but structural integrity and performance in terrace regions deteriorate
Solution Approach 1:
The patent applies local quality by creating different word line thicknesses in different regions of the device. Specifically, the terrace region receives an additional thickened word line layer while the memory array region maintains the standard word line thickness, allowing each region to have optimized structural properties for its specific function
Solution Approach 2:
The word line structure is segmented into multiple layers with different thicknesses deposited at different stages. The first set of word lines is formed with standard thickness, then the terrace region is selectively thickened with additional material, creating a multi-layered segmented structure that provides both uniformity where needed and localized reinforcement where required
2Strength
If thickened word lines are formed in terrace region only, then structural integrity improves, but manufacturing process complexity increases
Solution Approach 1:
The patent uses preliminary action by forming sacrificial material layers with varying lateral extents before the actual word line deposition. These sacrificial layers are prepared in advance with the exact pattern needed, and then used as templates to guide the selective deposition of thickened word lines, simplifying the overall manufacturing process
Solution Approach 2:
Sacrificial material layers serve as intermediaries in the manufacturing process. These temporary structures are formed first, then used to guide the selective deposition of thickened word line material, and finally removed or retained depending on the design, acting as a mediating element that enables complex patterning without requiring equally complex direct fabrication methods
3Manufacturing precision
If sacrificial material layers have decreasing lateral extent with vertical distance, then self-aligned material growth is enabled, but manufacturing steps increase
Solution Approach 1:
The patent applies self-service through self-aligned material growth where the thickened word line material automatically deposits only on the sacrificial material layers and not on surrounding areas. The sacrificial layers themselves serve as the alignment reference, eliminating the need for separate alignment steps or additional masking processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of robust memory stack structures with thickened word lines, enhancing the structural integrity and performance of three-dimensional memory devices by ensuring proper contact via structures and conductive layer thickness variations.
Implementation Method 1
forming self-aligned material portions on physically exposed surfaces of the sacrificial material layers in the terrace region employing a selective deposition process in which a material selectively grows from the physically exposed surfaces of the sacrificial material layers
Data Source
AI summary
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate. Memory stack structures are located in a memory array region, each of which includes a memory film and a vertical semiconductor channel. Contact via structures located in the terrace region and contact a respective one of the electrically conductive layers. Each of the electrically conductive layers has a respective first thickness throughout the memory array region and includes a contact portion having a respective second thickness that is greater than the respective first thickness within a terrace region. The greater thickness of the contact portion prevents an etch-through during formation of contact via cavities for forming the contact via structures.