Thin Film Memory Cell Gate Formation via Select Gate Splitting
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Solution Overview
Problem
The semiconductor industry faces challenges in reducing the complexity and cost of manufacturing smaller and more complex memory cells, particularly in the production of thin film storage memory cells, which require multiple steps and intricate processes.
Innovation Solution
A method for forming a thin film storage memory cell involves creating a long select gate, depositing thin film storage crystals, and forming left and right control gates with a gap in between, where the central select gate portion is removed to form separate select gates, simplifying the process by eliminating the need for additional steps to isolate the drain or remove spacer material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional methods are used to form select gates and control gates separately with spacer removal, then precise gate formation is achieved, but manufacturing complexity and number of steps increase
Solution Approach 1:
The patent merges the formation of select gates and control gates into a single simultaneous deposition step. Both gates are formed at the same time using the same masking and deposition process, eliminating the need for separate spacer formation and removal steps. This reduces manufacturing complexity while maintaining precise gate formation through the use of a single mask pattern definition step.
Solution Approach 2:
The patent performs preliminary actions by pre-defining the complete gate structure (both select gates and control gates) in a single masking step before any other processing. The mask is designed to simultaneously define both gate structures, and the deposition process then forms both gates in one operation, eliminating subsequent spacer removal operations.
2Manufacturing precision
If multiple manufacturing steps are used to form gates and remove spacers, then precise structure control is achieved, but production time and cost increase
Solution Approach 1:
The patent combines multiple manufacturing steps into a single deposition operation. Both select gates and control gates are formed simultaneously in one deposition step, and the mask serves dual purposes of defining both gate structures. This merging of operations reduces production time and increases throughput while maintaining precise structural control through the mask design.
Solution Approach 2:
The patent achieves continuous useful action by performing the formation of both gate structures in an uninterrupted single deposition process. The mask remains in place throughout, and the deposition continuously builds both gate structures without interruption or intermediate removal steps, maximizing production efficiency while maintaining precision.
3Reliability
If conventional gate formation with spacer removal is used, then isolated gate structures are achieved, but additional manufacturing steps are required
Solution Approach 1:
The patent merges the formation of isolated gate structures into a single deposition step with a single mask. The mask pattern is designed to define both select gates and control gates simultaneously, and the deposition process forms both structures with proper isolation built-in through the mask design, eliminating the need for separate spacer formation and removal steps.
Solution Approach 2:
The mask structure serves multiple functions simultaneously: it defines the select gates, defines the control gates, and establishes the isolation between structures. The single mask pattern is self-sufficient in defining the complete gate architecture without requiring additional spacer structures or removal steps to achieve isolation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of manufacturing steps and simplifies the process, leading to cost-effective and efficient production of smaller memory cells with improved electrical characteristics, such as asymmetrical source/drain junctions, which enhance the flexibility and performance of memory cells.
Implementation Method 1
Ions are implanted into the substrate underlying the gap to form a drain, and ions are implanted into the substrate aligned with the left and right control gates to form a left and right source
Data Source
AI summary
Methods are provided for manufacturing a thin film storage memory cell. The method includes forming a long select gate on a substrate, and forming thin film storage crystals overlying the long select gate and the adjacent substrate. A left and right control gate are formed on opposite sides of the long select gate, and a long select gate center portion is removed to form a left select gate and a right select gate with a gap therebetween. A drain is formed in the substrate underlying the gap, and a left and right source are formed in the substrate aligned with the left and right control gate.


