Thin-Film Varactor Structure for Low-Parasitic IC Capacitance
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Solution Overview
Problem
The fabrication of varactors in semiconductor processes, particularly those using gate-all-around devices, is challenging due to the need for reliable and controlled p-n junctions, which are costly and prone to parasitic capacitance issues, and existing transistors often have limitations in capacitance and voltage due to breakdown concerns.
Innovation Solution
The use of high-performance thin film transistor (HP TFT) material, which is orthogonal or vertically stacked between anode and cathode, allowing for flexible placement on the backside of the wafer, reducing parasitic capacitance and improving the capacitance ratio, and can be formed independent of a crystalline substrate, thereby enhancing the Q factor and reducing series resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If p-n junctions are used for varactor fabrication, then capacitance control is improved, but manufacturing cost increases and parasitic capacitance worsens
Solution Approach 1:
The patent extracts the varactor function from traditional p-n junction structures and implements it using the gate-channel capacitance of thin-film transistors. This separates the varactor fabrication from costly p-n junction formation processes while maintaining capacitance control through gate voltage modulation.
Solution Approach 2:
The patent changes the physical parameters by using thin-film transistor gate-channel capacitance instead of p-n junction depletion capacitance. By controlling gate voltage, the capacitance can be dynamically adjusted, achieving precise control without requiring complex p-n junction fabrication processes.
2Adaptability or versatility
If conventional transistors are used for varactor application, then device availability is improved, but capacitance performance and voltage tolerance worsen
Solution Approach 1:
The patent employs composite material structures in thin-film transistors, combining specific semiconductor layers with optimized gate dielectric materials. This composite approach enables higher breakdown voltages and improved capacitance performance while maintaining device availability through standard thin-film fabrication processes.
3Ease of manufacture
If varactors are fabricated on front side of wafer, then process integration is improved, but available space and design flexibility worsen
Solution Approach 1:
The patent moves varactor fabrication from the traditional front-side planar dimension to the back-side vertical dimension of the wafer. This dimensional transition allows varactors to be formed in the interlayer dielectric layers without occupying valuable front-side active device area, thereby conserving space while maintaining process integration through vertical stacking.
4Ease of manufacture
If standard transistor structures are used, then fabrication simplicity is improved, but Q factor and series resistance performance worsen
Solution Approach 1:
The patent applies local quality optimization by specifically engineering the thin-film transistor channel region and gate interface to minimize parasitic effects. Through localized material composition control and interface optimization in the TFT structure, the Q factor is enhanced and series resistance is reduced while maintaining overall fabrication simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies varactor manufacturing, improves capacitance performance, and conserves space on the front side of the wafer, while allowing for tailored varactor structures and reduced series resistance in LC circuits, leading to enhanced varactor performance and flexibility in integrated circuit design.
Implementation Method 1
a depletion region to form in the TFT channel material responsive to a voltage applied to the varactor
Data Source
AI summary
An integrated circuit device comprising a varactor comprising a first conductive contact; a second conductive contact; and a thin film transistor (TFT) channel material coupled between the first conductive contact and the second conductive contact.


