Thin Hard Mask for 3D Semiconductor Device Patterning
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Solution Overview
Problem
Current methods for manufacturing 3D semiconductor devices with stacked structures face challenges in achieving high storage capacity, electrical reliability, and stability, while also dealing with the fragility of thin and high patterns that can easily deform or collapse during the manufacturing process, leading to increased costs and reduced production yield.
Innovation Solution
A method utilizing a thin hard mask is employed to form a semiconductor device with protruding strips, where a charging trapping layer and conductive layers are conformally deposited, and a patterned photo resist is used to create trenches and pattern the hard mask, resulting in a solid and reliable structure with reduced manufacturing time and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If thin and high patterns are formed to achieve smaller unit cells and greater storage capacity, then storage capacity and device miniaturization are improved, but the patterns become fragile and prone to deformation or collapse during manufacturing
Solution Approach 1:
The patent divides the pattern formation process into multiple stages using different mask thicknesses. A thin hard mask (50-150 nm) is used for initial patterning where high precision is needed, while a thicker hard mask (200-500 nm) is used for subsequent steps where structural support is needed. This segmentation allows each stage to be optimized independently for its specific requirements.
Solution Approach 2:
The patent applies different mask thicknesses to different locations and stages of the manufacturing process. The thin hard mask is applied where high patterning precision is required, while the thicker hard mask is applied where mechanical support is needed to prevent collapse. This local differentiation of quality (thickness) optimizes both precision and structural integrity.
2Reliability
If thicker hard mask is used to provide structural support for thin patterns, then pattern stability is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent implements a dynamic mask thickness strategy where the mask thickness is adjusted based on the specific manufacturing step and location. Rather than using a uniformly thick mask throughout, the system dynamically selects thin or thick masks based on real-time process requirements, optimizing both support and complexity.
Solution Approach 2:
The patent changes the physical parameter of mask thickness from a fixed value to a variable parameter that can be adjusted according to process needs. By varying the thickness parameter (50-500 nm range) across different stages, the system achieves both structural support and process simplicity without requiring complex additional structures.
3Ease of manufacture
If conventional thick hard mask is used for patterning, then manufacturing robustness is improved, but process window and production yield decrease
Solution Approach 1:
The patent performs preliminary patterning actions using a thin hard mask before applying the thicker support mask. This preliminary action establishes the precise pattern geometry early in the process, and subsequent steps with thicker masks maintain this pattern without compromising the already-established precision. The preliminary action ensures high yield by locking in the pattern early.
Solution Approach 2:
The thin hard mask acts as an intermediary layer that transfers the pattern from the photoresist to the final structure. This intermediary thin mask enables precise pattern transfer while the thicker mask provides support, allowing the system to achieve both high precision and robustness that neither mask could achieve alone.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances the process window, increases production yield, and reduces manufacturing costs by creating a solid and reliable 3D semiconductor device structure with improved electrical properties and reduced deformation issues, enabling efficient fabrication of both vertical-channel and vertical-gate devices.
Implementation Method 1
depositing a thin hard mask conformally on the conductive layer
Implementation Method 2
a plurality of trenches are formed between the thin hard mask on the protruding strips; forming a patterned photo resist on the thin hard mask, and the patterned photo resist filling into the trenches
Data Source
AI summary
A method for manufacturing semiconductor device is disclosed. A substrate with a plurality of protruding strips formed vertically thereon is provided. A charging trapping layer is formed conformally on the protruding strips. A conductive layer is formed conformally on the charging trapping layer. A thin hard mask is conformally deposited on the conductive layer, wherein a plurality of trenches are formed between the thin hard mask on the protruding strips. A patterned photo resist is formed on the thin hard mask, wherein the patterned photo resist fills into the trenches. The thin hard mask is patterned according to the patterned photo resist to form a patterned hard mask layer and expose a portion of the conductive layer. The conductive layer is patterned for removing the exposed portion of the conductive layer to form a patterned conductive layer and expose a portion of the charging trapping layer.