Thin QFN Chip Thermal Cycling Resistance
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Solution Overview
Problem
QFN packages without lead frames face reliability issues due to thermal stresses, as the chip's rigidity prevents it from expanding with the printed circuit board, leading to potential detachment of contacts during thermal cycling, especially in applications with high thermal demands like the automotive industry.
Innovation Solution
A semiconductor chip with a thickness of less than 160 µm, occupying between 25% to 50% of the package area, is used, with conducting wires connecting chip contacts to peripheral contacts on the package, allowing the chip to deform with the board and absorb thermal expansion, thereby reducing mechanical stresses on solder joints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the chip is made rigid to maintain structural integrity, then the chip can support itself during handling and assembly, but the chip cannot expand with the printed circuit board during thermal cycling, leading to contact detachment
Solution Approach 1:
The patent changes the physical parameter of chip thickness from conventional dimensions to less than 160 μm. This parameter change transforms the chip from a rigid structure to a flexible one that can deform during thermal cycling, allowing it to expand with the printed circuit board while maintaining structural integrity through its optimized thin profile
Solution Approach 2:
The patent introduces dynamic flexibility to the chip structure by reducing its thickness, enabling it to adapt its shape during thermal cycles. The chip transitions from a static rigid structure to a dynamic one that can deform and recover, following the expansion and contraction of the printed circuit board without detaching contacts
2Area of moving object
If the chip occupies a large area of the package to maximize functionality, then more functional elements can be integrated, but the chip becomes more susceptible to thermal stress and detachment
Solution Approach 1:
The patent applies parameter changes by optimizing the chip thickness to less than 160 μm, which fundamentally alters the chip's mechanical properties. This allows the chip to occupy a large package area for maximum functionality while the reduced thickness provides flexibility to withstand thermal stress and prevent detachment
3Stability of the object's composition
If conventional thick chips are used to ensure mechanical stability, then the chip maintains rigidity during assembly, but the package thickness increases and thermal stress resistance decreases
Solution Approach 1:
The patent changes the chip thickness parameter to less than 160 μm, transforming the mechanical stability approach from rigidity through thickness to stability through optimized thin structure. This parameter change enables both mechanical stability during assembly and thermal cycling resistance through controlled flexibility
Solution Approach 2:
The patent employs the principle of flexible thin structures by reducing the chip to a thin film-like component with thickness less than 160 μm. This thin flexible structure can deform during thermal cycling to match the printed circuit board expansion, preventing contact detachment while maintaining mechanical integrity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the resistance to thermal cycling by allowing the chip to follow the deformations of the printed circuit board, reducing mechanical stresses on solder joints and making QFN packages compatible with high-thermal applications without modifying existing packaging processes.
Implementation Method 1
allowing the chip to deform with the board and absorb thermal expansion
Implementation Method 2
the chip to follow the deformations of the printed circuit board
Data Source
Figure 1A~2
Figure 3
AI summary
The invention relates to an electronic circuit (1) comprising a semiconductor chip (5) having a thickness (e) less than 160 µm and a housing (2) with flush contacts (3, 4) in which the chip is encapsulated.