Thinned Chip Carrier Reducing Assembly Stress

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Solution Overview

Problem

The mechanical stress applied during the assembly of semiconductor chips on conventional substrates can lead to bending stress and crack formation, reducing the reliability of the devices due to the mechanical load and shrinkage of glue materials used in the assembly process.

Innovation Solution

A chip carrier is designed with a thinned chip contacting region, where the thickness at the contact pads is smaller than in the supporting region, to reduce mechanical stress and enhance reliability by allowing for a more even distribution of forces during assembly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a conventional substrate with uniform thickness is used to support the chip, then the substrate provides sufficient mechanical strength and stability, but the mechanical stress during assembly causes bending stress and crack formation in the chip

Engineering Contradiction:
Improvemechanical strength of substrateVSAvoidchip reliability
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The substrate is designed with non-uniform thickness, where the chip contacting region has reduced thickness compared to the supporting region. This local variation in thickness allows the substrate to have different mechanical properties in different areas: the thinned contacting region reduces stress concentration on the chip, while the thicker supporting region maintains overall structural strength and stability.

Inventive Principle:
Principle #3Local quality

2Reliability

If the chip is pressed onto the substrate during assembly to ensure good electrical contact, then the electrical connection is improved, but the mechanical load causes deformation and bending stress of the chip

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidchip shape stability
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The substrate thickness is locally reduced in the chip contacting region to decrease the mechanical load during pressing. This allows the chip to be adequately pressed for electrical contact while minimizing the pressing force required, thereby reducing deformation and bending stress on the chip structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Instead of varying the substrate thickness in the plane of the substrate, the invention varies the thickness in the vertical dimension (perpendicular to the substrate surface). This dimensional approach allows the substrate to provide different levels of mechanical support at different locations without affecting the lateral dimensions or overall footprint of the device.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10163820B2Chip carrier and method thereof
Publication Date: 2018.12.25 INFINEON TECHNOLOGIES AG
  • US10163820B2 patent drawing
  • US10163820B2 patent drawing
  • US10163820B2 patent drawing

AI summary

A method may include providing a chip carrier having a chip supporting region to support a chip, and a chip contacting region having at least one contact pad, the chip carrier being thinner in the chip contacting region such that a first thickness of the chip carrier at the at least one contact pad is smaller than a second thickness of the chip carrier in the chip supporting region. A disposing of the chip, having at least one contact protrusion, over the chip carrier, such that the at least one contact protrusion is arranged over the at least one contact pad may be included. In addition, a pressing of the chip against the chip carrier such that the at least one contact protrusion extends at least partially into the chip contacting region and is electrically contacted to the at least one contact pad may be included.