Three-Dimensional Oxide-Semiconductor Memory Structure for High Density
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Solution Overview
Problem
There is a need for semiconductor devices with higher memory capacity and density.
Innovation Solution
The semiconductor device is structured with multiple layers and conductors, insulators, and oxide semiconductors, including specific elements like indium, zinc, and gallium, to enhance memory capacity and density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are stacked to increase memory capacity per unit area, then memory density is improved, but device complexity increases
Solution Approach 1:
The semiconductor device is divided into multiple stacked layers (first layer, second layer, third layer, etc.), each containing memory cells with conductors and insulators. This segmentation allows memory capacity to be increased through vertical stacking while managing complexity through modular layer design
Solution Approach 2:
The patent transitions from planar memory cell arrangement to three-dimensional stacking, utilizing the vertical dimension to increase memory capacity per unit area. Multiple layers are stacked above each other with conductors extending through insulator layers, effectively using spatial dimensionality to resolve the contradiction between memory capacity and device footprint
2Quantity of substance
If multiple conductors and insulators are stacked to increase memory density, then memory capacity is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs a nested structure where conductors are embedded within insulator layers, and multiple conductor-insulator pairs are stacked within each other. The first conductor, second conductor, third conductor, etc., are nested within respective insulator layers (first insulator, second insulator, third insulator), creating a compact vertical structure that increases memory density while using standardized repetitive manufacturing processes
Solution Approach 2:
The patent utilizes parameter changes in material properties and layer dimensions to optimize manufacturing. Different insulator materials (oxide insulators, nitride insulators) with varying dielectric properties are employed at different layers, and conductor thicknesses and spacing are controlled within specific ranges to balance manufacturing feasibility with memory density requirements
Data Source
AI summary
A semiconductor device with a high memory density is used. The semiconductor device includes a first layer and a first insulator. The first layer includes a first oxide semiconductor, first to ninth conductors and second to fifth insulators. The first layer is located over the first insulator. The first oxide semiconductor is located above the first insulator. The first and sixth conductors are each located on a top surface and a side surface of the first oxide semiconductor and a top surface of the first insulator. The second and fourth conductors are each located on the top surface of the first oxide semiconductor. The second insulator and the third conductor are located between the first conductor and the second conductor, and the third insulator and the fifth conductor are located between the second conductor and the fourth conductor. The fourth insulator and the seventh conductor are located between the fourth conductor and the sixth conductor. The fifth insulator and the eighth conductor are located over the first conductor in a region that does not overlap with the first oxide. The ninth conductor is located over the second conductor.