Three-FET High-Voltage Switch With Bias Control for 5 V CMOS
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory devices, particularly those employing floating-gate technology, require high-voltages for programming and erasing, which are challenging to manage in low-voltage CMOS processes, necessitating the development of efficient high-voltage switching circuits.
Innovation Solution
The implementation of switch circuits using chains of serially coupled field effect transistors (FETs) that provide single-ended and differentially switched high-voltage output signals, with control/bias circuits managing the voltage distribution to ensure safe and effective switching within a 5 V CMOS process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-voltage switching is implemented in low-voltage CMOS processes, then memory devices can operate reliably without voltage breakdown, but the switching circuit complexity increases due to the need for multiple serially coupled FETs
Solution Approach 1:
The high-voltage switching function is segmented into multiple serially coupled FETs (typically three FETs per switch), where each FET handles a portion of the total voltage. This segmentation prevents any single device from experiencing excessive voltage stress while achieving the required high-voltage switching capability through the series combination of multiple lower-voltage devices.
Solution Approach 2:
Control/bias circuits serve as intermediary components that generate appropriate gate voltages for each FET in the series chain. These intermediary control circuits enable the main switching FETs to operate reliably by providing precise voltage control, allowing the system to achieve high-voltage switching in a low-voltage CMOS process without direct high-voltage stress on individual switching elements.
2Ease of manufacture
If serially coupled FET chains are used for high-voltage switching, then voltage distribution is controlled and safe switching is achieved, but the number of components and circuit area increases
Solution Approach 1:
Multiple FETs are merged into series chains where they share common nodes and control signals. The control/bias circuits are designed to simultaneously control multiple FETs within a compact configuration, reducing the overall circuit area compared to using separate switching circuits for each voltage level. This merging approach maintains safe voltage distribution while minimizing the area penalty.
Solution Approach 2:
The control/bias circuits are designed to serve multiple functions: they control the switching operation of multiple FETs in the series chain, provide voltage division, and ensure safe operating conditions. This multi-functionality reduces the need for separate dedicated circuits for each function, thereby reducing the overall circuit area while maintaining manufacturing safety.
3Adaptability or versatility
If three serially coupled FETs are used per switch, then high-voltage switching capability is achieved in 5 V CMOS process, but the manufacturing precision requirements increase
Solution Approach 1:
The control/bias circuits dynamically adjust the gate voltages of each FET in the series chain to compensate for manufacturing variations. By changing the control parameters (gate voltages) based on the actual device characteristics, the system achieves consistent high-voltage switching performance despite variations in individual FET threshold voltages and other parameters that occur during manufacturing.
Solution Approach 2:
The control/bias circuits incorporate feedback mechanisms that monitor the voltage distribution across the series FET chains and adjust the gate control voltages accordingly. This feedback ensures that each FET operates within its safe voltage limits and that the total switching voltage is properly distributed, compensating for manufacturing precision variations and ensuring reliable high-voltage switching capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables reliable high-voltage switching in low-voltage CMOS processes, preventing excessive voltage exposure to devices and ensuring robust operation of memory devices without breaking down, thus facilitating efficient data storage and retrieval.
Implementation Method 1
a chain of at least three serially coupled field effect transistors (FETs) that receives the high supply voltage and switches it to output the high-voltage output signal
Data Source
AI summary
Switch circuits are disclosed, for providing a single-ended and a differentially switched high-voltage output signals by switching a high supply voltage in response to at least one logic-level control signal. The switch that provides the single-ended switched high-voltage output signal includes a chain of at least three serially coupled field effect transistors (FETs). The chain receives the high supply voltage and switches it to output the high-voltage output signal. The switch that provides the differentially switched high-voltage output signal includes two differentially coupled chains, each having at least three serially coupled FETs. The chains receive the high supply voltage and switch it to output the differential high-voltage output signal. A control/bias circuit provides a control voltage to at least one of the FETs in the chains, responsive to the control signal.