Three-Terminal Capacitor Overlap Mounting for Impedance Reduction
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Solution Overview
Problem
The challenge lies in effectively mounting three-terminal capacitors on a multilayer circuit substrate to overlap with semiconductor devices, as their larger size compared to two-terminal capacitors results in increased impedance and degraded electrical characteristics due to non-overlapping configurations, which hinder the suppression of voltage fluctuation and noise.
Innovation Solution
The solution involves a semiconductor device with power supply and ground pads connected to a three-terminal capacitor mounted on a substrate with optimized wiring layers, where the power supply and ground terminals of the capacitor are connected via wide wiring layers to reduce impedance, and a two-terminal capacitor is placed to overlap with the semiconductor device for low impedance coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If three-terminal capacitors are mounted to overlap with semiconductor devices, then voltage fluctuation suppression and noise reduction are improved, but the larger planar size of three-terminal capacitors makes this mounting configuration difficult to achieve
Solution Approach 1:
The patent transitions from planar mounting to three-dimensional overlapping mounting. The three-terminal capacitor is positioned to overlap with the semiconductor device in the vertical dimension, allowing electrical connection through via holes that pass through the substrate. This dimensional change enables the capacitor to be electrically connected to the semiconductor device while occupying minimal planar area, thus resolving the contradiction between achieving good electrical characteristics and maintaining compact layout.
Solution Approach 2:
The three-terminal capacitor is effectively nested within the vertical space above the semiconductor device. The capacitor body is positioned such that its projection overlaps with the semiconductor device footprint, and it is electrically connected through conductive via holes that penetrate the substrate. This nesting approach allows the capacitor to function as if it were directly adjacent to the semiconductor device while consuming minimal additional planar area.
2Area of stationary object
If three-terminal capacitors are mounted away from semiconductor devices due to size constraints, then mounting area is reduced, but impedance increases and electrical characteristics are degraded
Solution Approach 1:
The substrate with via holes acts as an intermediary that enables electrical connection between the three-terminal capacitor and the semiconductor device despite their spatial separation in planar view. The via holes provide low-impedance vertical conduction paths that compensate for the horizontal distance, allowing the capacitor to be positioned in a space-efficient manner while maintaining excellent electrical characteristics through the substrate's conductive pathways.
3Reliability
If multiple two-terminal capacitors are mounted to overlap with semiconductor devices, then voltage fluctuation suppression is improved, but the larger planar size required for three-terminal capacitors prevents effective use of overlapping configuration
Solution Approach 1:
The three-terminal capacitor is designed to perform multiple functions that were previously requiring separate components. It provides both the noise reduction function and the voltage fluctuation suppression function that were achieved by combining two-terminal capacitors with the semiconductor device. The overlapping mounting configuration with via-hole connection enables this multi-functional capacitor to be positioned optimally without increasing planar area, thus simplifying the overall mounting configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the electrical characteristics of the electronic device by reducing impedance and improving noise suppression and voltage stability, allowing the three-terminal capacitor to function effectively as both a bypass capacitor and an EMI filter.
Implementation Method 1
a three-terminal capacitor 50 having a first power supply terminal 51, a second power supply terminal 52, and a ground terminal 53
Implementation Method 2
reduce the impedance of a path from a power supply terminal of the semiconductor device to a ground terminal of the semiconductor device via the bypass capacitor
Implementation Method 3
the power supply and ground terminals of the capacitor are connected via wide wiring layers to reduce impedance
Implementation Method 4
a two-terminal capacitor is placed to overlap with the semiconductor device for low impedance coupling
Implementation Method 5
since the first and second three-terminal capacitors are grounded in common, an electromagnetic compensation effect by noise flowing in the ground layer is caused
Data Source
AI summary
To improve electric characteristics of an electronic device. An electronic device includes a semiconductor device and a three-terminal capacitor mounted on the upper surface of a mounting substrate, the semiconductor device includes a power supply pad and a ground pad, the power supply pad and the ground pad are electrically connected with a power supply land and a ground land, respectively, and the power supply land and the ground land are allocated to a land line in an outermost periphery of the semiconductor device, Then, the power supply land and the ground land are electrically connected to the three-terminal capacitor by wirings formed on the upper surface of the mounting substrate.