Threshold-Voltage Logic Gates With Parallel Transistor Topology
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Solution Overview
Problem
Conventional logic families are vulnerable to reverse engineering, which can lead to security issues such as IP/IC piracy and counterfeiting, as their functionality can be distinguished through physical appearance, particularly due to the use of different threshold voltage devices that are hard to identify.
Innovation Solution
The implementation of an enhanced threshold voltage defined (E-TVD) logic family using a sense-amplifier based circuit with a parallel configuration of transistors, reducing the number of transistors required for the same functionality and making it difficult to determine the specific Boolean function through reverse engineering by utilizing different threshold voltage devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional logic families use different threshold voltage devices to protect against reverse engineering, then security against IP/IC piracy is improved, but the physical appearance becomes distinguishable and vulnerable to reverse engineering
Solution Approach 1:
The patent changes the threshold voltage parameter of transistors to create different current characteristics. By using transistors with different VT (threshold voltage) values, the logic gates produce distinct current profiles that are difficult to distinguish through reverse engineering, while maintaining functional equivalence
Solution Approach 2:
The patent creates multiple copies of logic gates with identical functionality but different internal implementations using various VT device combinations. These copies are physically indistinguishable in terms of Boolean function but differ in current characteristics, making reverse engineering difficult
2Productivity
If conventional TVD logic gates use stacked transistor configurations to implement Boolean functions, then the logic functionality is achieved, but the number of transistors and circuit area increase
Solution Approach 1:
The patent merges multiple transistor functions into a single transistor by using different VT devices. Instead of stacking transistors in series to achieve different logic functions, the invention uses parallel transistors with different threshold voltages to perform the same function with fewer devices
Solution Approach 2:
The patent creates universal logic gate structures that can implement multiple Boolean functions (NAND, NOR, XNOR, etc.) using the same physical configuration of transistors. The functionality is changed by selecting different VT device combinations rather than restructuring the circuit
3Adaptability or versatility
If conventional TVD logic gates use multiple stacked transistors to accommodate increased number of inputs, then the logic gate can handle more inputs, but the area, delay, and power consumption increase
Solution Approach 1:
The patent transitions from a vertical stacking approach (series connection) to a horizontal parallel approach. Instead of stacking transistors vertically to handle more inputs, the invention uses parallel transistor configurations with different VT values, effectively changing the dimensional organization of the circuit
Data Source
AI summary
The present disclosure describes systems, apparatuses, and methods for implementing a logic gate circuit structure for operating one or more Boolean functions. Instead of stacking transistors in series to accommodate an increased number of inputs, a parallel configuration is presented that significantly reduces the cascaded number of transistors and the total number of transistors for the same functionality.