Throttle Control Circuits for Fast IC Power Response
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The integration of processing units and supporting devices in integrated circuits (IC) chips leads to significant delays in power management responses, causing thermal and power issues such as di/dt events, voltage droop, and heat generation, which can result in performance degradation or damage.
Innovation Solution
A hierarchical power management system with local area management (LAM) circuits and a centralized power estimation and limit (PEL) circuit, combined with a throttle control circuit, dynamically throttles power consumption by controlling activity in processing segment circuits through throttle control signals, reducing state changes during specific clock cycles to manage power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If processing units and supporting devices are integrated in IC chips to increase functionality, then device complexity increases, but power management response time increases causing thermal and power issues
Solution Approach 1:
The power management system is segmented into hierarchical levels: a centralized PEL circuit for overall power estimation and limiting, and distributed LAM circuits for local power management. This segmentation allows fast local response to power events while maintaining centralized coordination, resolving the contradiction between integrated functionality and power management response time.
Solution Approach 2:
LAM circuits act as intermediaries between the processing units and the centralized PEL circuit. These intermediate power management circuits locally monitor power consumption and generate throttle control signals, enabling rapid response to power events without requiring all signals to traverse the entire integrated circuit.
2Temperature
If power consumption is reduced to prevent thermal issues, then thermal management improves, but processing performance degrades
Solution Approach 1:
The power management system dynamically adjusts power consumption based on real-time power events and processing needs. The throttle control circuits modulate activity in processing segment circuits, adjusting power levels flexibly rather than applying static limits, thereby maintaining performance when thermal constraints are not active.
Solution Approach 2:
The system implements feedback mechanisms where LAM circuits continuously monitor power consumption and power events, feeding this information back to the PEL circuit and local throttle control circuits. This feedback loop enables adaptive power management that reduces power only when necessary while maintaining high performance during acceptable thermal conditions.
3Reliability
If power limits are enforced to prevent damage, then reliability improves, but processing activity is throttled reducing productivity
Solution Approach 1:
The power management system takes preliminary action by monitoring power events and generating throttle control signals before power limits are exceeded. The LAM circuits detect power consumption patterns and preemptively adjust processing activity, preventing damage before it occurs rather than reacting after limits are violated.
Solution Approach 2:
The system applies partial throttling rather than complete shutdown when power limits approach. The throttle control circuits selectively reduce activity in specific processing segment circuits based on the severity and location of power events, maintaining necessary processing activity while preventing damage.
Data Source
AI summary
A throttle control circuit receives a throttle control signal for controlling power consumption in a plurality of processing segment circuits. The throttle control signal has a throttle control value based on throttle requests from monitoring circuits that have detected power-related events or conditions and correspond to a requested change in activity in the plurality of processing segment circuits. The throttle control circuit receives the throttle control signal in a plurality of throttle administration circuits that each generates a throttle select signal to select an activity control signal for a corresponding processing segment circuit. In each of a first number (N) of consecutive cycles of a clock signal, the activity control signal disables state changes in the corresponding processing segment circuit for a second number (M) of cycles among the first number (N) of consecutive cycles to reduce power consumption in the processing segment circuits.


