Through Electrode Upper Wiring Thermal Stress Management

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Solution Overview

Problem

Thermo-mechanical stress caused by thermal expansion coefficient differences between conductive metals and insulation layers in semiconductor devices leads to potential electrical contact failures in multi-level metal interconnect structures, particularly in through silicon via (TSV) technology.

Innovation Solution

A semiconductor device design featuring a through electrode with a specific upper wiring structure, including a first upper wiring that is concentric or formed on the edge portions of the through electrode, and a second upper wiring with extended conductive lines, all electrically connected and surrounded by inter-metal dielectric layers, which minimizes the impact of thermal stress by controlling the contact area and preventing upward expansion of the through electrode.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a through electrode is formed to penetrate the insulation interlayer and substrate, then electrical connectivity between stacked devices is improved, but thermal stress concentration causes the through electrode to lift off or crack surrounding structures

Engineering Contradiction:
Improveelectrical connectivityVSAvoidthermal stress
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

An upper wiring structure is introduced as an intermediary element between the through electrode and the bump. This upper wiring acts as a mediator that distributes the thermal stress away from the through electrode, preventing stress concentration that would cause lift-off or cracking. The upper wiring absorbs and disperses the thermal expansion forces generated during subsequent processing steps.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The design changes the geometric parameters of the through electrode by making its cross-sectional area smaller than that of the upper wiring. This parameter change ensures that the upper wiring has greater thermal mass and can better accommodate thermal expansion, thereby protecting the through electrode from stress-induced damage while maintaining electrical connectivity.

Inventive Principle:
Principle #35Parameter changes

2Loss of substance

If the through electrode cross-sectional area is made small to reduce material usage, then manufacturing cost is reduced, but stress concentration increases causing contact failure

Engineering Contradiction:
Improveconductive materialVSAvoidcontact stability
Core Design Contradiction:
Loss of substanceVSReliability

Solution Approach 1:

The conductive path is segmented into two distinct components: a small cross-sectional through electrode for material efficiency and a larger cross-sectional upper wiring for stress distribution. This segmentation allows each component to be optimized for its specific function - the through electrode minimizes material usage while the upper wiring provides mechanical stability and stress relief.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The upper wiring serves as a protective intermediary structure that shields the thin through electrode from thermal stress. By positioning the upper wiring above the through electrode and giving it a larger cross-sectional area, the design creates a stress-distributing layer that prevents contact failure while allowing the through electrode to remain small for material efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If subsequent processing steps are performed at high temperature, then manufacturing efficiency is improved, but thermal expansion differences cause thermo-mechanical stress around the through electrode

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidthermal stress
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The upper wiring is formed in advance, before subsequent high-temperature processing steps. This preliminary action ensures that the stress-distributing structure is already in place to protect the through electrode during upcoming manufacturing processes such as bump formation or encapsulation that require high temperatures.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The design changes the thermal parameters of the interconnect structure by introducing an upper wiring with larger cross-sectional area and different material properties. This parameter change increases the thermal capacity and stress tolerance of the structure, enabling it to withstand high-temperature subsequent processing steps without generating excessive thermo-mechanical stress.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively reduces the risk of contact failure by managing thermal stress, ensuring reliable electrical connectivity and structural integrity in semiconductor devices during subsequent processing steps.

Implementation Method 1

a through electrode having a first surface and a second surface, wherein the through electrode penetrates the insulation interlayer and the via region of the substrate... a first upper wiring formed on a portion of the first surface of the through electrode, and a second upper wiring on the first upper wiring and electrically connected to the first upper wiring

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

inter-metal dielectric layers, which minimizes the impact of thermal stress by controlling the contact area and preventing upward expansion of the through electrode

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Data Source

PatentUS8836109B2Semiconductor device and method of manufacturing a semiconductor device
Publication Date: 2014.09.16 SAMSUNG ELECTRONICS CO LTD
  • US8836109B2 patent drawing
  • US8836109B2 patent drawing
  • US8836109B2 patent drawing

AI summary

A semiconductor device includes a substrate having a via region and a circuit region, an insulation interlayer formed on a top surface of the substrate, a through electrode having a first surface and a second surface, wherein the through electrode penetrates the via region of the substrate and the second surface is substantially coplanar with a bottom surface of the substrate, a first upper wiring formed on a portion of the first surface of the through electrode, a plurality of via contacts formed on a portion of a top surface of the first upper wiring, and a second upper wiring formed on the plurality of via contacts.