Through-substrate conductor support via encapsulated vias
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Solution Overview
Problem
The increasing complexity and cost of chip-scale technology packaging, particularly in direct surface-mount packages, due to the need for additional processing steps and the use of through-silicon vias (TSVs) for routing signals across the die, result in higher costs and larger footprints, while wire-bonded chips have limited IO contacts and increased costs from additional processing steps.
Innovation Solution
A method involving a first conductor traversing a cavity in a bonded wafer assembly, encapsulated and severed to form segments, with a second conductor deposited over the severed edge for indirect electrical connection, avoiding the use of TSVs and reducing the need for extensive surface routing, thus lowering costs and footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If through-silicon vias (TSVs) are used for routing signals across the die, then signal routing capability is improved, but manufacturing cost and footprint increase
Solution Approach 1:
The patent transitions from planar surface routing to three-dimensional routing by forming conductive structures that extend vertically through the substrate. Conductive pillars and vias are created that route signals in the depth dimension rather than only across the surface, enabling complex signal interconnections without increasing footprint area.
Solution Approach 2:
The patent implements nested conductive structures where conductive pillars are formed within cavities in the substrate, and additional conductive layers are deposited around and between these pillars. This nested arrangement allows multiple signal paths to be packed into a compact vertical space, increasing routing capacity without proportionally increasing footprint.
2Area of stationary object
If direct surface-mount packages are used, then footprint is reduced, but manufacturing cost increases due to additional processing steps
Solution Approach 1:
The patent performs preliminary actions during substrate processing by forming conductive pillars and cavities before die attachment. The substrate is prepared with pre-formed conductive interconnect structures, eliminating the need for costly post-attachment routing operations and reducing overall manufacturing complexity while maintaining compact footprint.
Solution Approach 2:
The patent merges multiple functions into the substrate structure itself. The substrate serves simultaneously as mechanical support, electrical interconnection medium, and signal routing platform. By integrating conductive pillars and cavities directly into the substrate, the invention eliminates separate packaging layers and reduces the number of discrete processing steps required.
3Area of stationary object
If wire-bonding is used for IO contacts, then footprint is reduced, but the number of IO contacts is limited and processing cost increases
Solution Approach 1:
The patent moves IO contact formation from two-dimensional surface bonding to three-dimensional vertical access. Multiple conductive pillars can be formed in close proximity within the substrate thickness, allowing a higher density of IO contacts to be achieved within the same footprint area compared to traditional wire-bonding methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs and footprint by eliminating the need for TSVs and extensive surface routing, enabling more efficient and cost-effective production of integrated circuits with increased IO contacts without the limitations of traditional wire-bonded chips.
Implementation Method 1
disposing an encapsulate and curing the encapsulate
Data Source
AI summary
In described examples, a first device on a first surface of a substrate is coupled to a structure arranged on a second surface of the substrate. In at least one example, a first conductor arranged on the first surface is coupled to circuitry of the first device. An elevated portion of the first conductor is supported by disposing an encapsulate and curing the encapsulate. The first conductor is severed by cutting the encapsulate and the first conductor. A second conductor is coupled to the first conductor. The second conductor is coupled to the structure arranged on the second surface of the substrate.