Through-Substrate Via Layout With Offset Contact Alignment

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Solution Overview

Problem

The alignment of conductive vias with front side components in semiconductor devices is challenging, leading to manufacturing complexity and decreased production yield due to manufacturing deviations, which affects the reliability of backside routing structures.

Innovation Solution

The implementation of conductive vias that extend through the substrate and are purposefully offset from front side components, with extended contacts to ensure electrical connection, simplifying manufacturing processes and improving production yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conductive vias are aligned with front side components, then electrical connection is achieved, but manufacturing precision requirements increase and production yield decreases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidvia alignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Instead of aligning the via with the front side component (traditional approach), the patent inverts the approach by intentionally offsetting the via from the front side component. The via is positioned to connect with an extended contact structure on the backside, reversing the conventional alignment paradigm and reducing manufacturing precision requirements.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent moves the connection point from the front side (2D plane) to the backside of the substrate, adding a dimensional aspect to the connection geometry. This allows the via to connect with an extended contact structure on the backside rather than requiring precise alignment with the front side component.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If conductive vias are aligned with front side components, then electrical connection is achieved, but device complexity increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent simplifies the manufacturing process by inverting the alignment approach. Instead of requiring precise alignment between via and front side component, the via is intentionally offset and connects with an extended backside contact, reducing process complexity.

Inventive Principle:
Principle #13The other way round (Inversion)

3Manufacturing precision

If conductive vias are offset from front side components, then manufacturing precision requirements decrease, but electrical connection reliability may be compromised

Engineering Contradiction:
Improvevia placement precisionVSAvoidelectrical connection reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by extending the contact structure to the backside before via formation. This extended contact structure is prepared in advance to receive the offset via, ensuring reliable electrical connection is established before the via is actually formed and connected.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The extended contact structure acts as an intermediary element between the via and the front side component. It provides a robust connection point on the backside that mediates the electrical connection, allowing the via to be offset while maintaining connection reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250364408A1Semiconductor device including through via and method of making
Publication Date: 2025.11.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250364408A1 patent drawing
  • US20250364408A1 patent drawing
  • US20250364408A1 patent drawing

AI summary

A method of manufacturing a semiconductor device includes defining an active region on a first side of a substrate. The method further includes depositing a hardmask layer over the active region. The method further includes patterning the hardmask to form an opening exposing a portion of the substrate. The method further includes etching the portion of the substrate to define a through via opening. The method further includes forming a through via in the through via opening. The method further includes removing the hardmask layer between a portion of the through via and the active region. The method further includes forming a contact structure in direct contact with the active area and the portion of the through via.