THz FET Plasmonic Detection for Unbiased, High-Resolution VLSI Testing

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Solution Overview

Problem

The increasing complexity and decreasing feature size of integrated circuits pose challenges for non-destructive comprehensive and ubiquitous testing, with existing THz imaging limited by the diffraction limit and inadequate resolution for modern VLSI circuits.

Innovation Solution

Utilizing field effect transistors (FETs) as plasmonic detectors to test integrated circuits by probing non-linearities in electron plasma with THz radiation, enabling unbiased testing of transistors and circuits, and employing polarization dependence to enhance testing effectiveness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional THz imaging is used for testing integrated circuits, then the testing can be performed non-destructively, but the resolution is limited by the diffraction limit and inadequate for modern VLSI circuits

Engineering Contradiction:
Improvetesting resolutionVSAvoiddiffraction limit constraint
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces FETs as plasmonic detectors as an intermediary component between the THz radiation source and the integrated circuit under test. These FET-based detectors convert THz radiation into measurable electrical signals through plasmonic effects, enabling high-resolution testing that overcomes the diffraction limit of conventional THz imaging systems

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the operating parameters of FETs to operate in plasmonic regimes rather than conventional regimes. By adjusting gate voltages and operating frequencies to exploit plasmonic resonances, the system achieves enhanced responsivity and resolution beyond the diffraction limit, transforming the testing capability from diffraction-limited to plasmonically-enhanced

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If FETs are used as plasmonic detectors for unbiased testing, then comprehensive testing of VLSI circuits is enabled, but the device complexity increases

Engineering Contradiction:
Improvetesting coverageVSAvoiddetector system complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent makes FETs serve multiple functions: they act as both the test stimulus generator and the detector for measuring circuit response. The same FET-based plasmonic detector can test various types of integrated circuits (Si CMOS, GaAs, etc.) and multiple circuit parameters, providing universal testing capability that justifies the increased device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The FET-based plasmonic detector is self-biasing through the non-linearities in electron plasma, eliminating the need for external biasing circuits and reducing overall system complexity. The detector automatically adjusts its operating point based on the incident THz radiation, providing unbiased testing while maintaining simplified circuit architecture

Inventive Principle:
Principle #25Self-service

3Measurement precision

If polarization dependence is employed to enhance testing effectiveness, then measurement precision improves, but the complexity of the testing system increases

Engineering Contradiction:
Improvefault detection precisionVSAvoidpolarization control complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent utilizes the natural polarization response of plasmonic structures to THz radiation without requiring active polarization control mechanisms. The plasmonic detectors inherently exhibit polarization-dependent responses that directly map to different circuit features, enabling precise fault detection through passive polarization measurement rather than active control

Inventive Principle:
Principle #18Mechanical vibration

Solution Approach 2:

The patent exploits polarization-dependent signal intensity variations (analogous to color changes in optical systems) to enhance contrast between different circuit regions and defect types. By measuring signal strength at different polarization angles, the system achieves improved measurement precision for detecting faults without adding complex polarization control hardware

Inventive Principle:
Principle #32Color changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

FETs operating in plasmonic regimes provide enhanced responsivity for detecting faults in Si CMOS circuits, allowing for high-frequency testing without biasing, improving resolution beyond the diffraction limit, and enabling comprehensive testing of VLSI circuits.

Implementation Method 1

Utilizing field effect transistors (FETs) as plasmonic detectors to test integrated circuits by probing non-linearities in electron plasma with THz radiation

Methodology Applied
Scientific EffectPlasmonic effect: Plasma

Data Source

PatentUS12360159B2Terahertz plasmonics for testing very large-scale integrated circuits under bias
Publication Date: 2025.07.15 UNITED STATES OF AMERICA THE AS REPRESENTED BY THE SEC OF THE ARMY
  • US12360159B2 patent drawing
  • US12360159B2 patent drawing
  • US12360159B2 patent drawing

AI summary

Various embodiments are described that relate to failure determination for an integrated circuit. An integrated circuit can be tested to determine if the integrated circuit is functioning properly. The integrated circuit can be subjected to a specific radiation such that the integrated circuit produces a response. This response can be compared against an expected response to determine if the response matches the expected response. If the response does not match the expected response, then the integrated circuit fails the test. If the response matches the expected response, then the integrated circuit passes the test.