TI-ADC Clock Calibration Using a Square Wave Reference

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Solution Overview

Problem

Time-Interleaved Analog-to-Digital Converters (TI-ADCs) suffer from timing skew, leading to performance degradation due to random delays in clock phases of individual sub-ADCs, necessitating an effective calibration method.

Innovation Solution

An apparatus for calibrating TI-ADCs is proposed, featuring a clock generation circuit generating phase-shifted clock signals and a reference clock signal, along with a reference signal generation circuit and a coupling circuit that allows selective coupling of the input node to either the reference signal generation circuit or an analog signal node, enabling offline calibration and alignment of clock signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple lower speed sub-ADCs operate in parallel to achieve high aggregate sampling rate, then productivity is improved, but timing skew between sub-ADCs causes measurement precision to deteriorate

Engineering Contradiction:
Improveaggregate sampling rateVSAvoidtiming accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by performing timing calibration of sub-ADCs using a square wave reference signal before actual signal conversion. The calibration process pre-adjusts the timing of each sub-ADC by comparing its output with the known square wave reference, storing correction values that are applied during normal operation to compensate for timing skew without affecting the high sampling rate capability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses a square wave reference signal as an intermediary to mediate the timing calibration process. This reference signal with known characteristics serves as a mediator between the clock generation circuit and the sub-ADCs, allowing indirect measurement and correction of timing skew by comparing sub-ADC outputs against the reference rather than directly measuring clock phase differences

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If timing calibration is performed using complex reference signals, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvetiming calibration accuracyVSAvoidcalibration circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent employs a simple square wave reference signal instead of complex calibration signals. The square wave is generated by a basic DAC driven by a frequency-divided version of the clock signal, requiring minimal additional hardware. This simple reference signal is used temporarily during calibration mode and then discarded, with the calibration values stored for use during normal operation, avoiding the need for continuous complex reference signal generation

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent implements self-service by using the existing sub-ADCs themselves to perform the timing measurement during calibration. Each sub-ADC converts the square wave reference signal, and its own output is used to determine its timing offset. This eliminates the need for separate measurement circuits or external calibration equipment, as the conversion devices serve their own calibration needs

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10868556B2Apparatus for calibrating a time-interleaved analog-to-digital converter
Publication Date: 2020.12.15 INTEL CORP
  • US10868556B2 patent drawing
  • US10868556B2 patent drawing
  • US10868556B2 patent drawing

AI summary

An apparatus for calibrating a time-interleaved analog-to-digital converter including a plurality of time-interleaved analog-to-digital converter circuits is provided. The apparatus includes a clock generation circuit configured to generate a plurality of phase shifted clock signals for the plurality of time-interleaved analog-to-digital converter circuits and a reference clock signal. Further, the apparatus includes a reference signal generation circuit configured to generate a reference signal based on the reference clock signal. The reference signal is a square wave signal. The apparatus additionally includes a coupling circuit configured to controllably couple an input node of the time-interleaved analog-to-digital converter to either the reference signal generation circuit or to a signal node capable of providing an analog signal for digitization.