Ti-Si Source Drain Contacts for Stable SiGe Interfaces

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Solution Overview

Problem

High contact resistance and void formation in the epitaxial SiGe source and drain structures due to inter-diffusion during high temperature processing, leading to device failure in transistors.

Innovation Solution

Co-deposition of titanium and silicon on epitaxial SiGe source and drain structures to form a stable titanium silicide layer, which reduces contact resistance and prevents void formation during high temperature processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high temperature processing is applied to epitaxial SiGe source and drain structures, then metal source and drain contacts can be formed, but inter-diffusion occurs causing voids in the epitaxial SiGe

Engineering Contradiction:
Improvecontact reliabilityVSAvoidepitaxial SiGe composition stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

A titanium silicide layer is introduced as an intermediary barrier between the metal contact and the epitaxial SiGe source/drain. This intermediate layer prevents direct inter-diffusion between the metal contact materials and the SiGe structure during high temperature processing, thereby avoiding void formation while maintaining reliable electrical contact.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The contact structure uses a composite material approach by combining titanium and silicon to form titanium silicide. This composite material provides both low contact resistance for good electrical connectivity and thermal stability to prevent inter-diffusion with the epitaxial SiGe during high temperature processing.

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If conventional metal contacts are used on SiGe source and drain, then device fabrication can proceed, but contact resistance and void formation lead to device failure

Engineering Contradiction:
Improvefabrication processabilityVSAvoiddevice reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The titanium silicide layer is formed in advance before the final metal contact deposition and high temperature processing steps. This preliminary formation of a stable, low-resistance interface ensures that subsequent processing steps can proceed without causing inter-diffusion or void formation, thereby preventing device failure.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The co-deposited titanium and silicon layer provides low contact resistance (less than 2e-9 Ohm-cm2) and enhances the reliability of transistor structures by maintaining the integrity of the epitaxial SiGe interface.

Implementation Method 1

Co-deposition of titanium and silicon for improved silicon germanium source and drain contacts

Methodology Applied
Scientific EffectChemical Bonding: Chemical Bonding

Implementation Method 2

co-deposited titanium and silicon layer

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS12439669B2Co-deposition of titanium and silicon for improved silicon germanium source and drain contacts
Publication Date: 2025.10.07 INTEL CORP
  • US12439669B2 patent drawing
  • US12439669B2 patent drawing
  • US12439669B2 patent drawing

AI summary

Source and drain contacts that provide improved contact resistance and contact interface stability for transistors employing silicon and germanium source and drain materials, related transistor structures, integrated circuits, systems, and methods of fabrication are disclosed. Such source and drain contacts include a contact layer of co-deposited titanium and silicon on the silicon and germanium source and drain. The disclosed source and drain contacts improve transistor performance including switching speed and reliability.