Time-Based Sensing Circuit for Low Power Resistive Memory
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Solution Overview
Problem
Conventional sensing circuits for programmable resistive devices require high supply voltage and current to convert resistance into logic states, making it difficult to operate under low voltage and low current conditions, especially in IoT applications.
Innovation Solution
A time-based sensing circuit that charges a capacitor to a supply voltage and discharges it through a programmable resistive element, comparing the discharging time with a reference voltage to determine resistance, allowing for low voltage and low current sensing without relying on MOS device threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional voltage sense amplifier is used to sense PRE resistance, then resistance can be converted into logic level, but substantial amount of current is required to bias MOS device in high gain region
Solution Approach 1:
The patent changes the sensing parameter from voltage-based (requiring high current to bias MOS in high gain region) to time-based measurement. By measuring the time constant of capacitor discharge through the PRE, the system achieves resistance sensing without requiring substantial bias current, thus resolving the contradiction between measurement precision and energy consumption.
Solution Approach 2:
The patent replaces the conventional voltage amplification mechanism (which requires high current) with a time-based measurement approach using capacitor discharge. This substitution eliminates the need for high current operation while maintaining resistance sensing capability, addressing the energy consumption issue.
2Measurement precision
If high supply voltage is used to enable MOS device to operate in high gain region, then sensing can be achieved, but power consumption increases
Solution Approach 1:
The patent changes the operating parameter from high voltage (required for MOS high gain operation) to low voltage time constant measurement. By using the RC time constant of capacitor discharge, the system achieves sensing at low supply voltages without increasing power consumption, resolving the contradiction between sensing capability and energy usage.
3Use of energy by moving object
If low supply voltage (0.4V) is used in IoT applications, then power consumption is reduced, but MOS device cannot operate in high gain region
Solution Approach 1:
The patent replaces the voltage amplification mechanism (which fails at low voltages) with a time-based measurement approach. By measuring capacitor discharge time constant, the system achieves resistance sensing at low supply voltages (0.4V) without relying on MOS high gain operation, thus maintaining sensing capability while operating at low power.
Solution Approach 2:
The patent changes the sensing mechanism from voltage-dependent (MOS gain) to time-dependent (RC constant). This parameter change enables the system to operate correctly at low supply voltages where MOS devices cannot provide high gain, resolving the contradiction between low power consumption and sensing capability.
4Measurement precision
If conventional voltage sensing scheme is used, then resistance can be sensed, but device complexity and operational complexity increase
Solution Approach 1:
The patent extracts the essential sensing function from the complex voltage amplification circuitry. By using simple capacitor discharge time measurement, the system achieves resistance sensing with minimal circuit elements, reducing both device complexity and operational complexity while maintaining measurement capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient resistance sensing in programmable resistive memory cells using low supply voltage and low current, suitable for applications like IoT devices, by converting resistance into logic states based on time delays, reducing power consumption and operational complexity.
Implementation Method 1
a capacitor (101, 111) coupled to a supply voltage line (VDD) through a charging pass gate (102, 112) and coupled to ground through a discharge pass gate (106, 116). The capacitors (101, 111) are also coupled to inverters (107, 117), respectively, that serve as logic comparators
Implementation Method 2
The discharge pass gate (106) couples to a programmable resistive device (103). The programmable resistive device (103) includes a programmable resistive element (104) coupled in series with a selector (105) that couples to ground
Data Source
AI summary
A programmable resistive memory has a plurality of programmable resistive devices (PRD) and at least one sensing circuit. The at least one of the programmable resistive device can include at least one programmable resistive element (PRE). The sensing circuit can include one PRD unit and a reference unit. Each unit has at least one capacitor to charge to a second supply voltage line and to discharge to the first supply voltage line through the PRE and the reference element, respectively. The capacitors are also coupled to comparators to monitor discharging voltages with respect to a reference voltage. By comparing the time difference when the comparators change their outputs, the magnitude of the PRE resistance with respect to the reference element resistance can be determined and converted into logic states.