Time-Interleaved ADC Correction Using Per-Channel Neural Calibration
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Solution Overview
Problem
Time-interleaved analog-to-digital converters (ADCs) face errors due to gain and offset variances among individual ADC units, leading to noise in the output signal, which existing optimization methods, such as improved IC design, can increase costs without fully addressing process variations.
Innovation Solution
A machine learning system, specifically a neural network, is integrated into the TI ADC device to analyze and correct output errors by identifying the responsible ADC unit and applying customized correction schemes, trained on simulation or measurement data including PVT parameters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple ADC units are operated in parallel to increase effective sampling rate, then productivity is improved, but manufacturing precision deteriorates due to gain and offset variances among individual units
Solution Approach 1:
The patent divides the ADC system into multiple independent ADC units (first ADC unit, second ADC unit, etc.) that operate in parallel. Each unit processes different time-interleaved portions of the input signal, allowing the overall sampling rate to be multiplied by the number of units while maintaining individual unit simplicity and manufacturability.
Solution Approach 2:
The patent applies parameter changes by using a machine learning system that dynamically adjusts correction parameters (gain and offset corrections) for each ADC unit based on measured performance characteristics. This allows the system to compensate for manufacturing variations without requiring tighter manufacturing tolerances, thus resolving the contradiction between high productivity and manufacturing precision.
2Manufacturing precision
If IC design is optimized to reduce ADC unit errors, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent implements a self-service approach where the system automatically measures and corrects its own errors using an integrated machine learning system. The system performs self-diagnosis by measuring the actual gain and offset errors of each ADC unit and applies automatic self-correction through dynamically generated correction parameters, eliminating the need for complex manual calibration procedures and reducing overall device complexity.
Solution Approach 2:
The patent incorporates feedback mechanisms where the output of each ADC unit is monitored and fed back to the machine learning system. This feedback loop enables real-time detection of performance deviations and automatic adjustment of correction parameters, allowing the system to maintain high manufacturing precision without requiring overly complex upfront design specifications.
3Measurement precision
If machine learning system is trained with PVT parameters, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-training the machine learning system with comprehensive PVT (process, voltage, temperature) parameter data during the manufacturing or initialization phase. This pre-training establishes a robust foundation of correction strategies that can handle various operating conditions. Once trained, the system requires minimal additional complexity during operation, as the heavy computational work has already been performed in advance.
Solution Approach 2:
The patent creates a universal machine learning model that can handle multiple functions: correcting gain errors, offset errors, and PVT-related variations across different operating conditions. By training the system with diverse PVT parameters, a single model learns to generalize across various scenarios, reducing the need for separate correction systems for each condition and thereby limiting the increase in device complexity.
Data Source
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AI summary
A system includes a time-interleaved analog-to-digital converter (TI ADC). The TI ADC includes a plurality of ADC units connected in parallel between an input terminal and an output terminal of the time-interleaved ADC. An ADC tag generator is configured to output a first identifier of a first ADC unit of the plurality of ADC when the first ADC unit is enabled. An error correction system is configured to receive a first digital signal from the output terminal of the time-interleaved ADC, receive the first identifier of the first ADC unit from the ADC tag generator, modify the first digital signal to generate a first corrected digital signal by compensating for first analog-to-digital conversion errors occurring within the first ADC unit by applying a first error correction scheme that is associated with the first ADC unit, and output the first corrected digital signal.