Timer Circuit Synchronization for Dual Lane Motor Controllers
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Solution Overview
Problem
In dual lane motor control systems, especially those with dual wound motors, maintaining synchronization of reference timer signals from separate crystal oscillators is challenging due to factors like temperature influences, leading to potential incorrect motor function if timer frequencies are not carefully matched.
Innovation Solution
A timer circuit with a calculating unit that adjusts the number of oscillator cycles (N* and M*) to match the period of one timer signal with another, using counters and trigger signals to ensure synchronization, allowing for precise matching of timer periods across independent oscillator circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate crystal oscillators are used for each lane in a dual lane motor controller, then each lane can operate independently, but the timer frequencies may drift apart due to temperature influences and other factors, leading to synchronization issues
Solution Approach 1:
The system uses a feedback mechanism where the master lane monitors the actual frequency of its oscillator and compares it with the nominal frequency. Based on this comparison, it dynamically adjusts the timer period to compensate for frequency drift. This closed-loop control ensures that both lanes maintain synchronized timer signals despite using separate oscillators that are subject to temperature and other environmental influences.
Solution Approach 2:
The system changes the timer period parameter dynamically based on the measured oscillator frequency. Instead of using a fixed timer period, the master lane calculates the appropriate period adjustment factor and applies it to maintain synchronization. This allows the system to adapt to frequency variations while maintaining the independence of separate oscillator circuits.
2Measurement precision
If the timer period is adjusted to compensate for frequency differences between oscillators, then synchronization is improved, but the complexity of the timer circuit increases due to the need for frequency measurement and calculation
Solution Approach 1:
The master lane performs self-diagnosis by monitoring its own oscillator frequency and automatically adjusting its timer period without external intervention. The system uses built-in counters and calculators within the master lane to measure frequency and compute the necessary period adjustment, eliminating the need for additional external synchronization hardware or complex inter-lane communication circuits.
Solution Approach 2:
The master lane is designed to perform multiple functions: it generates PWM signals, monitors oscillator frequency, calculates period adjustments, and synchronizes the slave lane. By consolidating these functions in the master lane, the system avoids duplicating complex synchronization hardware in both lanes, thereby reducing overall system complexity while maintaining synchronization precision.
3Measurement precision
If the oscillator frequency is measured and used to adjust the timer period, then accurate synchronization is achieved, but the time required to establish accurate timing increases due to the measurement and calculation process
Solution Approach 1:
The system performs frequency measurement and period calculation in advance during the initialization phase, before normal PWM operation begins. The master lane measures its oscillator frequency, calculates the required period adjustment factor, and configures the timer accordingly before starting motor control. This preliminary setup ensures that synchronization is established quickly without affecting real-time motor control performance.
Solution Approach 2:
The system performs frequency monitoring and period adjustment periodically rather than continuously. The master lane measures oscillator frequency at predetermined intervals and updates the timer period accordingly. This periodic approach balances the need for accurate synchronization with the constraint of minimizing time loss, as frequent measurements would increase processing overhead while infrequent measurements might allow drift to accumulate.
Data Source
AI summary
A timer circuit for use with a dual lane motor controller has two motor controllers, each motor controller generating PWM drive signals having a period defined by a respective timer of the timer circuit. The timer circuit comprises a first processing circuit associated with the first motor controller and comprising a first oscillator circuit, a first timer which outputs a first timer signal each time the oscillator circuit has completed a set integer number N of oscillations, and a second processing circuit associated with the second motor controller and comprising a second oscillator circuit. The second processing circuit includes a second timer which outputs a second timer signal each time the oscillator circuit has completed an integer number N* of oscillations, and calculates a value of N* that is dependent on the difference between the frequency of the first oscillator circuit and the second oscillator circuit required to match the period of the second timer signal to the period of the first timer signal.