Timing Assistant for Dynamic Voltage Drop Analysis
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Large integrated circuits, such as System-on-a-Chip (SoC) designs, face reduced operational frequency due to dynamic voltage drop-induced timing constraints, making it difficult to identify and address critical timing paths effectively.
Innovation Solution
A timing assistant tool is developed to predict critical timing paths by applying predictive models that account for dynamic voltage drop, using a two-stage inference engine to identify top-ranked switching scenarios and paths, allowing for focused SPICE-based timing analysis and optimization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional timing analysis methods are used on all timing paths, then comprehensive timing coverage is achieved, but computational complexity and analysis time increase significantly
Solution Approach 1:
The patent segments the timing analysis process into two distinct stages: (1) a fast screening stage using static timing analysis to identify potentially critical paths, and (2) a detailed verification stage using SPICE-based dynamic voltage drop analysis only on the identified critical paths. This segmentation allows comprehensive timing coverage while reducing computational complexity by applying intensive analysis only where necessary.
Solution Approach 2:
The patent applies different quality levels of analysis to different portions of the timing paths. Critical paths identified through the two-stage process receive high-quality SPICE-based analysis with dynamic voltage drop consideration, while non-critical paths are assessed using faster static timing analysis methods. This local quality approach ensures accurate analysis where needed while maintaining overall efficiency.
2Measurement precision
If SPICE-based timing analysis is performed on all timing paths, then dynamic voltage drop effects are accurately captured, but analysis time becomes prohibitively long
Solution Approach 1:
The patent performs preliminary static timing analysis to identify critical paths before conducting SPICE-based dynamic voltage drop analysis. This preliminary action filters out non-critical paths, ensuring that time-intensive SPICE simulations are executed only on a small subset of paths most likely to exhibit dynamic voltage drop effects, thereby dramatically reducing total analysis time while maintaining measurement precision for critical paths.
3Reliability
If comprehensive timing analysis is performed without predictive modeling, then all critical paths are identified, but the process is inefficient and resource-intensive
Solution Approach 1:
The patent implements a feedback mechanism where results from static timing analysis feed into the selection of paths for SPICE-based analysis, and results from SPICE analysis feed back into refining the identification of critical paths. This iterative feedback process improves critical path identification accuracy while maintaining high analysis efficiency by continuously focusing resources on the most promising candidates.
Solution Approach 2:
The patent introduces predictive modeling as an intermediary between static timing analysis and full SPICE-based analysis. This intermediary layer uses machine learning models trained on historical data to predict which paths are most likely to be critical, thereby guiding the SPICE analysis process and improving both identification accuracy and analysis efficiency.
Data Source
AI summary
Example systems and methods are disclosed for performing a timing analysis on a circuit design. A plurality of switching scenarios are identified for the circuit design. One or more predictive models are applied to predict a subset of the plurality of switching scenarios that are likely to cause timing paths with critical timing problems. A dynamic voltage analysis is performed on timing paths based on the subset of switching scenarios. The one or more predictive models are applied to predict a set of critical timing paths based on the subset of switching scenarios that are likely to cause critical timing problems, the one or more predictive models taking into account the dynamic voltage analysis. A timing analysis is the performed on the set of critical timing paths.