TiN Gate Electrode Work Function Tuning for CMOS

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Solution Overview

Problem

Semiconductor devices with CMOS structure face challenges in achieving low threshold voltages and preventing metal etching failures due to limitations in work function adjustment of TiN and TiAlN electrodes, particularly in nMOSFET and pMOSFET regions, and the difficulty in using high work function metals like Ru, Mo, and Pt for PMOS due to etching issues.

Innovation Solution

The solution involves forming Ti-rich TiN and N-rich TiN layers for nMOSFET and pMOSFET regions, respectively, within the TiN or TiAlN electrodes, allowing for dual-work function gates with adjusted nitrogen (N), aluminum (Al), and titanium (Ti) content, enabling low threshold voltages and preventing etching failures by using TiN or TiAlN materials advantageous for metal etching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high work function metals (Ru, Mo, Pt) are used for PMOS gate electrode, then the work function is sufficient for pMOSFET, but etching difficulty and low thermal stability occur

Engineering Contradiction:
Improvework function sufficiency for pMOSFETVSAvoidetching difficulty
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent adjusts the composition parameters of TiN (specifically the Ti:N ratio) to achieve different work functions. By controlling the nitrogen content and titanium content, the work function of TiN can be tuned to provide sufficient work function for PMOS while maintaining etchability and thermal stability, thus resolving the contradiction between work function requirement and manufacturing ease.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If TiN is used for gate electrode, then etching is easy, but the work function is insufficient for both nMOSFET and pMOSFET

Engineering Contradiction:
Improveetching easeVSAvoidwork function sufficiency
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent modifies the compositional parameters of TiN by adjusting the titanium to nitrogen ratio. By creating Ti-rich or N-rich TiN layers, the work function can be increased to meet the requirements for both nMOSFET and pMOSFET while preserving the etching advantages of TiN material.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite structures such as TiN/SiO2/Si or TiAlN/SiO2/Si where the TiN layer is combined with other materials. This composite approach allows the TiN to provide etching ease while the interface and composition are optimized to achieve sufficient work function for CMOS operation.

Inventive Principle:
Principle #40Composite materials

3Reliability

If dual-metal gate electrode is used for CMOS, then ideal work functions for nMOS and pMOS are achieved, but etching failure of metal electrode occurs

Engineering Contradiction:
Improvework function optimization for CMOSVSAvoidetching failure
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent makes TiN a universal material that can serve both nMOS and pMOS gate electrodes by compositional adjustment. Instead of using different metals for different transistor types, TiN with adjusted Ti:N ratios can provide the necessary work functions for both device types, eliminating etching failures associated with dual-metal approaches.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent applies parameter changes to TiN composition to create regions with different work functions within the same material system. By controlling the Ti:N ratio in different gate regions, ideal work functions for both nMOS and pMOS are achieved while using a single etchable material.

Inventive Principle:
Principle #35Parameter changes

4Ease of manufacture

If silicon oxide layer is used as gate dielectric, then it is compatible with standard process, but gate leakage current increases with design rule reduction

Engineering Contradiction:
Improveprocess compatibilityVSAvoidgate leakage current
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent uses composite dielectric structures such as SiO2/HfO2/SiO2 or similar high-k material combinations. The high-k dielectric layer (e.g., HfO2) is sandwiched between silicon oxide layers to provide both process compatibility and reduced gate leakage current, as the high-k material allows thicker equivalent oxide thickness while maintaining electrical performance.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS9466600B2Semiconductor device and method of manufacturing the same
Publication Date: 2016.10.11 SK HYNIX INC
  • US9466600B2 patent drawing
  • US9466600B2 patent drawing
  • US9466600B2 patent drawing

AI summary

The present disclosure relates to a semiconductor device and a method of manufacturing the same. The semiconductor device may include a first metal gate electrode provided in a NMOS region of a substrate; and a second metal gate electrode provided in a PMOS region of the substrate, wherein the first and second metal gate electrodes may be formed of TiN material or TiAlN material. Here, the first metal gate electrode may have a higher titanium (Ti) content than the second metal gate electrode, and the second metal gate electrode may have a higher nitrogen (N) content than the first metal gate electrode.