TMV Packaging Structure With Separated Signal and Heat Paths
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Solution Overview
Problem
Conventional wire-bonding packaging methods for electronic components result in increased package volume, limiting high-density integration and miniaturization, and poor heat dissipation due to restricted heat dissipation areas, which affects the performance and reliability of electronic products.
Innovation Solution
A signal-heat separated TMV packaging structure that embeds a chip in an insulating dielectric material, separating heat dissipation metal faces from signal lines with an isolating layer, allowing direct heat transfer from the chip's passive face to the heat dissipation metal face, and using thermally-conductive metals for efficient heat transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional wire-bonding packaging method is used to pre-fix components on substrate surface and then wire bond, then electrical connection between components and substrate is realized, but package volume increases which cannot meet high-density integration and miniaturization requirements
Solution Approach 1:
The patent transitions from surface-mount packaging to through-substrate embedding, utilizing the vertical dimension through TMV structures to pass signals. The chip is embedded within the substrate thickness rather than mounted on the surface, effectively using the third dimension (depth) to reduce surface area occupation and enable higher integration density.
Solution Approach 2:
The chip is nested within the substrate structure, with the substrate material surrounding and embedding the chip. The TMV structures penetrate through the substrate to establish electrical connections, creating a nested configuration where the chip is contained within the substrate volume rather than attached externally.
2Reliability
If chip is packaged with packaging material on one side and welded to PCB through bonding pad on the other side, then electrical connection is achieved, but heat dissipation effect becomes poor due to limited space for heat dissipation copper surface
Solution Approach 1:
The patent separates the signal transmission function and heat dissipation function into distinct pathways. Signal lines are routed through TMV structures embedded in the substrate, while heat dissipation is handled by dedicated copper surfaces on the substrate. This segmentation allows each function to be optimized independently without spatial conflict.
Solution Approach 2:
The substrate acts as an intermediary structure that simultaneously provides signal transmission pathways (through TMV) and heat dissipation surfaces (through copper layers). The substrate material mediates between the chip and the external environment, separating signal and thermal management functions while enabling both to coexist efficiently.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables higher-density integrated packaging with improved heat dissipation by separating signal and heat pathways, enhancing the thermal efficiency of the chip and reducing the limited heat dissipation area issues.
Implementation Method 1
the passive face of the chip is in heat transfer connection with the heat dissipation metal face
Implementation Method 2
the heat dissipation metal face and the inner signal line layer are separated through the isolating layer
Data Source
AI summary
A signal-heat separated TMV packaging structure includes an insulating dielectric material, an inner signal line layer arranged in the insulating dielectric material, an outer signal line layer, a heat dissipation metal face and a chip. A first side of the insulating dielectric material is provided with an isolating layer. The outer signal line layer is arranged on a surface of a second side of the insulating dielectric material and is connected with the inner signal line layer through a TMV structure. The heat dissipation metal face is arranged on a surface of the first side of the insulating dielectric material, and is separated from the inner signal line layer. The chip is embedded in the insulating dielectric material, with an active face in electrically-conductive connection with the inner signal line layer and a passive face in heat transfer connection with the heat dissipation metal face.


