Touch Panel Display Source Line Connection Layering
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Solution Overview
Problem
In touch panel integrated display devices, the overlap of source line connection lines and common electrode connection lines with insulating films leads to increased load capacitance, causing signal delays and display defects such as a greenish screen, especially during column reverse driving or dot inversion driving.
Innovation Solution
The source line connection parts and signal line connection parts are arranged in different layers outside the display area, ensuring they do not overlap, reducing load capacitance and signal delays, and allowing for the restoration of the common electrode potential.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If source line connection lines and common electrode connection lines are arranged to overlap with insulating films interposed, then the frame can be made narrower, but load capacitance increases causing signal delay and display defects
Solution Approach 1:
The patent applies dimensionality change by transitioning from a two-dimensional planar arrangement to a three-dimensional stacked arrangement. Connection lines for different color pixels (R, G, B) are arranged in different layers vertically, allowing them to overlap in the planar view while being separated in the vertical dimension. This resolves the contradiction by enabling compact frame design without the harmful capacitive coupling that would occur with horizontal overlapping.
Solution Approach 2:
The patent segments the connection lines into separate layers for different color pixels. Instead of having all connection lines in a single plane, the R, G, and B pixel connection lines are divided into distinct vertical layers, reducing parasitic capacitance between adjacent lines while maintaining compact overall structure.
2Area of stationary object
If connection lines are arranged in overlapping configuration, then space is saved, but signal delay increases due to increased load capacitance
Solution Approach 1:
By arranging connection lines in different vertical layers rather than horizontal proximity, the patent reduces capacitive coupling while maintaining compact planar footprint. The vertical separation in the third dimension allows space savings without the penalty of increased load capacitance that would result from horizontal arrangement.
3Reliability
If common electrode potential shifts due to signal delay, then display defects occur, but maintaining original potential requires reducing load capacitance
Solution Approach 1:
The vertical layering of connection lines reduces parasitic capacitance, thereby reducing signal delay and preventing common electrode potential shifts. This structural approach in the vertical dimension achieves potential stability without requiring additional compensation circuits or complex control mechanisms.
Solution Approach 2:
The patent converts the potential harm of overlapping connection lines into a benefit by using vertical stacking. The overlapping arrangement that would normally increase capacitance is transformed into a low-capacitance structure through vertical separation, turning the space-saving configuration into a means of reducing parasitic effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces display defects like the greenish screen by minimizing signal delays and maintaining the original potential of the common electrode, even with potential fluctuations.
Implementation Method 1
function as touch electrodes that form electrostatic capacitors between the same and a finger or the like in the touch driving mode
Implementation Method 2
function as common electrodes that form lateral electric fields (horizontal electric fields) between the same and the pixel electrodes in the display driving mode
Data Source
AI summary
Provided is a technique that makes it possible to reduce display defects in a touch panel integrated display device. A touch-panel-equipped display device includes an active matrix substrate that includes a plurality of pixels each of which corresponds to any one of N colors (N is a natural number equal to or greater than three). The active matrix substrate includes: a plurality of source lines; a plurality of common electrodes that are used commonly for both of image display and touch position detection; and a plurality of signal lines that are connected with the common electrodes, respectively. Outside a display area of the active matrix substrate, the active matrix substrate includes: a source line driving circuit; a common electrode driving circuit that supplies a predetermined voltage signal to the signal lines; source line connection parts 12 that connect the source lines and the source line driving circuit; and signal line connection parts 510 that connect the signal lines and the common electrode driving circuit. The source line connection parts are arranged in such a manner that N source line connection parts 121(G), 122(R), 123(B) connected with the source lines of N of the pixels corresponding to N colors, respectively, are arranged in different layers so as to overlap with one another when viewed in a plan view. The signal line connection parts 510 are arranged at positions that do not overlap with the source line connection parts 12 when viewed in a plan view.