Track-Hold Circuit Tree for Low-Power Skew Timing Adjustment

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Solution Overview

Problem

Existing electronic circuit systems using time interleave systems for track hold circuits face challenges in high power consumption and complex phase adjustment when processing high-frequency analog signals, particularly in the second-stage track hold circuit group, where multiple circuits are required to operate at high speeds and precise timing synchronization.

Innovation Solution

The implementation of a hierarchical tree structure for track hold circuits, where the number of circuits increases with each hierarchy, and operation control signals are adjusted to operate at different frequencies in a time interleave manner, allowing for efficient power usage and simplified phase adjustment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If multiple track hold circuits are placed in parallel and operated in time interleave manner to increase processing speed, then the operation clock frequency is increased, but the power consumption increases significantly

Engineering Contradiction:
Improveoperation clock frequencyVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The system divides the high-speed processing task into multiple segments (track hold circuits operating at different frequencies) and processes them sequentially in time interleave manner. The first track hold circuit operates at a first frequency while the second track hold circuit operates at a second frequency (lower than the first), and they alternate processing to achieve an equivalent high processing speed without all circuits running at high frequency simultaneously, thus reducing power consumption.

Inventive Principle:
Principle #1Segmentation

2Speed

If multiple track hold circuits operate at high frequencies in parallel, then processing speed increases, but the phase adjustment becomes complex

Engineering Contradiction:
Improveprocessing speedVSAvoidphase adjustment complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

Different track hold circuits are assigned different operating frequencies and processing roles based on their position in the hierarchy. The first track hold circuit operates at a higher frequency for initial processing, while the second operates at a lower frequency for subsequent processing. This local differentiation in operating parameters simplifies the overall phase adjustment requirement compared to having all circuits operate at the same high frequency with complex phase relationships.

Inventive Principle:
Principle #3Local quality

3Reliability

If all track hold circuits operate at the same high frequency, then processing consistency is maintained, but power consumption increases

Engineering Contradiction:
Improveprocessing consistencyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system changes the operating frequency parameter of different track hold circuits based on their processing stage. The first track hold circuit operates at a first frequency while the second operates at a second frequency (lower than the first). This parameter differentiation allows each circuit to operate efficiently at its optimal frequency for its specific processing task, reducing overall power consumption while maintaining processing consistency through the time interleave coordination.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8415984B2Electronic circuit system, track hold circuit module, electronic circuit operation control method, and program thereof
Publication Date: 2013.04.09 NEC CORP
  • US8415984B2 patent drawing
  • US8415984B2 patent drawing
  • US8415984B2 patent drawing

AI summary

Provided is an electronic circuit system which facilitates skew timing adjustment while preventing increase of power consumption. An electronic circuit system includes: a track hold circuit module formed by a hierarchical tree structure of track hold circuits which can track-hold an analog value of an analog signal; and a control signal generation module which supplies an operation control signal to each of the track hold circuits in the hierarchical tree structure. In the hierarchical tree structure, the number of track hold circuits of each of the hierarchies is stepwise changed from the first hierarchy of the input side to which an analog signal is inputted, toward the final hierarchy of the final output side as the number of hierarchies is increased.