Transceiver Circuit Data Verification for Semiconductor Devices
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Solution Overview
Problem
Conventional data transmission methods, such as SPI, require lengthy readback sequences to verify data integrity, leading to potential malfunctions due to erroneous data being processed before verification, especially in burst write operations.
Innovation Solution
A semiconductor device with a transceiver circuit that allows for immediate readback during data writing, using a transfer buffer to ensure data accuracy and reliability by updating the register only upon successful match determination, and supporting both direct and conventional readback modes for versatility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional readback sequence is used (read after write completion), then data verification is performed, but readback time is excessively long
Solution Approach 1:
The patent implements preliminary readback during the write operation itself. The transceiver circuit reads back data from the transfer buffer while writing is in progress, before the write operation completes. This allows verification to occur in advance, reducing the total readback time while maintaining data integrity checks.
Solution Approach 2:
The patent enables continuous data verification during the write operation by implementing readback functionality that operates concurrently with data writing. The transceiver circuit continuously monitors data in the transfer buffer, ensuring verification happens without interrupting the write flow, thus eliminating idle verification time.
2Productivity
If data is written to register immediately after write operation, then processing can proceed, but erroneous data may cause internal circuit malfunction
Solution Approach 1:
The patent implements a feedback mechanism where the transceiver circuit reads back data from the transfer buffer and compares it with the expected data. Only when the readback data matches the written data does the system proceed to update the register. This feedback loop ensures data correctness before processing, preventing erroneous data from causing malfunctions while maintaining efficient processing.
Solution Approach 2:
The patent introduces the transfer buffer as an intermediary between the write operation and the register update. The buffer temporarily holds data during verification, acting as a mediator that decouples the write operation from the register update. This allows verification to occur without blocking the write flow, ensuring only correct data reaches the register.
3Loss of time
If transfer buffer is used for readback during writing, then readback time is reduced, but device complexity increases
Solution Approach 1:
The patent makes the transfer buffer multi-functional by using it both for temporary data storage during write operations and for readback verification. The same buffer structure serves dual purposes: holding incoming data during writing and providing data for verification. This eliminates the need for separate verification storage, reducing overall device complexity while enabling fast readback.
Data Source
AI summary
A semiconductor device, includes: a data input pin; a data output pin; an internal circuit; a register accessible by the internal circuit; and a transceiver circuit including a transfer buffer and configured to: write data input through the data input pin to the transfer buffer, and output the data through the data output pin; and transfer data stored in the transfer buffer to the register when a transfer command is input through the data input pin.