Transformer-Coupled CML Equalization Without Peaking Frequency Shift

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Solution Overview

Problem

Current data communication systems, particularly those using current-mode logic (CML), are inadequate for high-data communication applications as they fail to effectively equalize output peaking magnitude without shifting peaking frequency, and often incur power and area penalties with existing equalization methods.

Innovation Solution

The implementation of equalization modules using digital-to-analog converters (DACs) and switchable resistors/capacitors coupled to the secondary windings of transformers, allowing for adjustable equalization of CML outputs without frequency shift, compatible with adaptive equalization schemes like decision feedback equalization (DFE).

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing equalization methods are used in CML, then equalization can be applied, but power consumption increases and area penalties are incurred

Engineering Contradiction:
Improveequalization performanceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent introduces an intermediary equalization module coupled to the secondary winding of a transformer, which mediates the equalization process. This module includes a DAC that generates control signals to switchable resistors and capacitors, enabling precise equalization of output peaking magnitude without directly loading the CML output, thus reducing power consumption and area penalties while maintaining equalization effectiveness

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs switchable resistors and capacitors controlled by a DAC to dynamically adjust the equalization parameters. By changing the resistance and capacitance values through digital control, the system can adaptively equalize different output peaking magnitudes without requiring multiple fixed equalization circuits, thereby reducing overall power consumption and chip area

Inventive Principle:
Principle #35Parameter changes

2Reliability

If existing equalization methods are used in CML, then equalization can be applied, but device area increases

Engineering Contradiction:
Improveequalization performanceVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The equalization module is designed with a DAC and switchable resistor/capacitor array that can be controlled to provide multiple equalization settings. This single multi-functional module replaces what would otherwise require multiple dedicated equalization circuits for different conditions, significantly reducing the total device area while maintaining comprehensive equalization capability

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent uses a DAC to generate control signals that selectively activate different combinations of switchable resistors and capacitors. This digital control approach creates a virtual representation of multiple equalization circuits through software-controlled switching, eliminating the need for physical duplication of equalization hardware and thereby reducing area

Inventive Principle:
Principle #26Copying

3Reliability

If equalization is applied to adjust output peaking magnitude, then peaking magnitude is equalized, but peaking frequency shifts

Engineering Contradiction:
Improveoutput peaking magnitude equalizationVSAvoidfrequency stability
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent applies equalization locally at the secondary winding of the transformer through a dedicated equalization module, rather than globally at the CML output stage. This localized approach allows independent adjustment of output peaking magnitude without affecting the overall frequency response of the CML circuit, thereby preventing frequency shifts while achieving magnitude equalization

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables energy-efficient and high-performance equalization that adjusts output peaking magnitude without frequency shifts, reducing power consumption and component parasitic, and is compatible with various equalization systems, including adaptive schemes.

Implementation Method 1

a first transformer comprising a first primary winding and a first secondary winding. The primary winding is electrically coupled to the first resistor and the first output terminal

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Implementation Method 2

a capacitor module coupled to the first source terminal. The capacitor module includes a plurality of capacitors

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS9853842B2Continuous time linear equalization for current-mode logic with transformer
Publication Date: 2017.12.26 MARVELL ASIA PTE LTD
  • US9853842B2 patent drawing
  • US9853842B2 patent drawing
  • US9853842B2 patent drawing

AI summary

The present invention is directed to data communication systems and methods. More specifically, embodiments of the present invention provide a CML that uses one or more equalization modules to apply equalization via secondary windings of transformers that are coupled, directly or indirectly, to the CML outputs. The equalization modules comprises a DAC component that generates switching signals based on control signals received from an external equalization module. The equalization module also includes switchable resistors and/or capacitors. The switching signals are used to select switchable resistors and/or capacitors. By switching resistors and/or capacitors at the equalization module, the outputs of the CML are equalized. There are other embodiments as well.