Transient Isolation Circuit for Low Power State
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Solution Overview
Problem
Modern integrated circuits face challenges in reducing static power dissipation and suppressing spurious transient signals when shutting down and powering back inactive parts, which can interfere with other interconnected components.
Innovation Solution
An integrated circuit design incorporating a core-logic, isolation circuit, and controller that selectively provides outputs to a latch, allowing for the transition of core-logic from a high power state to a low power state while maintaining stable signal levels, thereby reducing power consumption and eliminating transient signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If inactive parts of the circuit are shut down to reduce static power dissipation, then power consumption is reduced, but spurious transient signals are generated that interfere with interconnected components
Solution Approach 1:
The latch is set to store the output value before power is removed from the core-logic. This preliminary action ensures that the output remains stable and does not generate transient signals when power is removed, as the latch maintains the last known state.
Solution Approach 2:
The latch acts as an intermediary between the core-logic and the output. It buffers the output signal and maintains stability during power transitions, preventing transient signals from propagating to interconnected components while allowing power to be reduced in the core-logic.
2Use of energy by moving object
If the core-logic is shut down to reduce power consumption, then dynamic power consumption is reduced, but transient voltage signals appear on signal lines interconnected to I/O pads
Solution Approach 1:
The latch is configured to capture and store the output value before power is removed from the core-logic. This ensures that the output signal maintains a stable state even when the core-logic is powered down, preventing transient voltage signals on interconnected signal lines.
Solution Approach 2:
The latch serves as an intermediary buffer that decouples the core-logic from the output during power transitions. It maintains signal stability on I/O pad interconnections while allowing the core-logic to be powered down for energy savings.
3Loss of energy
If power is removed from the core-logic to reduce power consumption, then static and dynamic power dissipation are reduced, but the circuit cannot maintain output signal stability
Solution Approach 1:
The latch is set to store the output value before power is removed from the core-logic. This preliminary action ensures that the output signal maintains stability even when power is removed, as the latch preserves the last known state.
Solution Approach 2:
The latch acts as an intermediary that maintains output signal stability during power removal. It buffers the signal and ensures continuous stability while allowing the core-logic to be powered down for energy savings.
Data Source
AI summary
An integrated circuit includes a core-logic providing a core-logic output, a latch in communication with the core-logic to store a state of the core-logic output, and an isolation circuit for selectively interconnecting the core-logic output to an input of the latch. The circuit also includes and a power consumption controller in communication with the core-logic, the latch and the isolation circuit, for controlling the latch to store a state of the core-logic output, and output a corresponding signal. The controller is further operable to signal the isolation circuit to isolate the core-logic output from the latch by providing an output corresponding to predetermined value and transition the core-logic from a high power state and a low power state. This prevents transient signals from propagating to interconnected circuit blocks and external devices.