Energy Efficient ICT TRIZ Cases
- Data Transfer Manager Circuit for Autonomous DMA Coordination
A dedicated data transfer management circuit coordinates direct memory access requests to assemble data packets without processor intervention.
- Reconfigurable Processor Predicate Signal Memory Activation
Predicate signal activation of distributed operation configuration memory reduces power consumption while maintaining routing configuration memory continuity.
- Adaptive Sampling Receiver for IoT Energy Efficiency
A 2.4 GHz receiver uses adaptive sampling to reduce power consumption.
- Processor Thermal Throttling via Zero Voltage Deep Power Down
A processor power control unit transitions execution units to a zero voltage state when thermal sensors detect overheating.
- Power Budget Allocation in Server Clusters
Dynamic power bounds optimize cluster efficiency by reducing energy costs.
- PDCCH Detection via CRC Check to Reduce UE Battery Drain
User equipment checks cyclic redundancy codes before blind decoding to reduce battery consumption while maintaining reliable control information detection.
- Ethernet Device Controlling Non-Ethernet Energy Saving
A unified policy domain merges control logic across heterogeneous network equipment, resolving synchronization gaps that cause unpredictable performance.
- Memory Controller Timing Delay for Shared Interface Data Collision
A memory controller delays read commands to stagger data placement on shared interfaces, preventing output collisions.
- Coupled Cyber-Physical Data Center Cooling and Compute Management
Hierarchical managers minimize a cost function balancing energy expenditure and quality of service by jointly optimizing workload placement and thermal control.
- Energy Proportional Multiprocessor Networks
Dynamic link speed tuning adapts data rates to traffic intensity, reducing power consumption in always-on high-speed channels.
- Transient Isolation Circuit for Low Power State
Isolation circuit selectively interconnects core logic output to a latch, enabling stable signal storage during power transitions.
- Display Apparatus Camera-Based User Presence Detection Power Saving
Camera-based user recognition system detects presence and sleep state to control power supply.
- Voice Input Detection Prevents Power Saving State Transition
A voice receiving unit detects speech input to keep an electronic device active during communication sessions.
- Serial Bus Node Wake-Up Module for Automotive Current Reduction
A serial bus wake-up module uses identification fields to selectively activate nodes from standby.
- Switch Fabric Congestion Avoidance via Rate Adjustment
A switch fabric mechanism adjusts data transmission rates to prevent packet loss.
- Adaptive I/O Polling Rate Adjustment for Power and Latency
Host computing devices adjust polling frequency to balance responsiveness against power consumption by detecting changes in input output device data streams.
- Link Layered Network SCMM Dynamic Routing
System Control and Modifying Messages dynamically adjust node transmission parameters, resolving radio traffic congestion during network recovery.
- Programmable Power Sequencer for Multi-Processor Systems
A programmable power distributing sequencer uses internal regulators and user scripts to control module power states.
- Network Device Duty Cycling for Power Reduction
A network device adjusts data processing rates to conserve energy.
- Auxiliary Call Control Component for Hibernating PC VoIP Reception
An auxiliary call control component signals a computing system to wake from hibernation and retrieve an incoming call.
- Overlapping Word Line Memory for High-Speed Low-Power Access
A memory device uses overlapping word lines to access consecutive addresses in parallel via dual-assigned cells.
- Virtual Machine Mobility via Service Appliance State Synchronization
Service appliances synchronize session state before virtual machine migration, preserving service continuity across data centers.
- North Bridge State Machine for Graphics Data Buffer Monitoring
A north bridge state machine monitors graphics data buffers to maintain continuous display output.
- Mobile Device Power Saving via Modem Data Processor Segmentation
Modem processor segmentation filters network packets to extend data processor hibernation time and reduce unnecessary power consumption.
- Active Buffered Memory Processing Elements Reduce Latency
Embedded processing elements in active buffered memory banks translate addresses and perform calculations locally, reducing latency and power consumption.
- Multi-Protocol Mesh Routing for Heterogeneous RF and PLC Links
Multiple protocol receivers detect link quality across RF and PLC links, routing data via availability metrics to resolve missing destination delays.
- Packet Rate Control for Lossless Oversubscribed Switching
Proactive packet rate control messages reduce arrival rates before oversubscription buffers fill, ensuring lossless delivery.
- Single 3D Image Processor for Dual Screen Game Console
Alternating frame output from a single processor eliminates flicker on dual screens while maintaining compact device configuration.
- Aggregate Bandwidth Control for Network Stability
A weighted fair share allocation mechanism dynamically distributes unused network bandwidth to active flows based on real-time utilization patterns.
- Clock Enable Throttling for Memory Power Savings
Throttling clock enable commands reduces power dissipation in high-density memory subsystems without increasing latency.
- Dynamic CODEC Selection for Battery-Powered Voice Devices
A selector adjusts CODEC sampling rates based on battery power levels to optimize voice processing.
- Network Device Loop-Back Unit for Power Saving Link State
A network device loop-back processing unit reroutes signals between receiving and transmitting lines to maintain active link state during standby.
- Hybrid Device Power State Coordination via Dual OS Segmentation
A hybrid information handling device coordinates power states between a primary and secondary operating environment using an embedded controller.
- Communication Control Device Virtual Response Power Saving
A communication control device generates virtual response information to maintain application functionality.
- Channel Interleaving for High-Bandwidth Memory Systems
An interleaving unit coordinates access channels between high-bandwidth and low-bandwidth memory devices to extend system capacity.
- Peripheral Control Bus Access Management for Power Reduction
A peripheral equipment control processor manages data flow via a dedicated bus to reduce power consumption.
- Standby Power Reduction via Sensing Unit Frame Image Detection
A sensing unit captures frame images in standby mode to generate signals for host activation.
- PCI Express Link Segmentation for Bandwidth and Power Optimization
Segmenting a single wide link into multiple independent paths reduces latency and power consumption by routing high-priority data through dedicated channels.