Transistor Array Spacer Layout for Precise Contact Formation
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Solution Overview
Problem
The semiconductor industry faces challenges in manufacturing high-density semiconductor devices with complex transistor arrays due to the complexity of forming source and drain contacts and spacers, which requires multiple masks and processes, increasing production costs and variability.
Innovation Solution
A manufacturing method that forms spacers within the spacer openings of a resist mask before forming source and drain contacts, simplifying the process by eliminating the need for dummy spacers and reducing the number of masks required, thereby simplifying the process and reducing production costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple masks and processes are used to form source and drain contacts and spacers, then the precision of contact formation is improved, but the device complexity and production cost increase
Solution Approach 1:
The patent combines the formation of spacers and source/drain contacts into a single integrated process step. The resist mask pattern simultaneously defines both the spacer locations and the contact hole locations, eliminating the need for separate masking steps that would otherwise be required to form these features independently.
Solution Approach 2:
The resist mask serves multiple functions: it defines the spacer positions, defines the contact hole positions, and acts as an etch stop layer. This multi-functional approach replaces what would traditionally require multiple specialized masks, reducing overall process complexity while maintaining precision.
2Reliability
If multiple masks and processes are used to form source and drain contacts and spacers, then the reliability of contact formation is improved, but the loss of time and productivity decrease
Solution Approach 1:
The spacers are formed in advance within the resist mask structure before the contact holes are etched. This preliminary formation ensures that spacer positioning is established early in the process, and subsequent contact hole etching automatically inherits this precise positioning without requiring additional alignment steps, thereby improving both reliability and speed.
Solution Approach 2:
By merging spacer formation and contact hole formation into a single etching step using the same resist mask, the patent eliminates intermediate steps and reduces total process time. The unified approach maintains reliability through consistent reference frames while significantly improving manufacturing throughput.
3Manufacturing precision
If dummy spacers are used in the manufacturing process, then the manufacturing precision of spacers is improved, but the device complexity and production cost increase
Solution Approach 1:
The patent extracts and eliminates the dummy spacer step from the manufacturing process. Instead of forming dummy spacers and then replacing them with final spacers, the method directly forms the final spacers in their correct positions within the resist mask, removing unnecessary intermediate steps and simplifying the overall manufacturing process.
Solution Approach 2:
The final spacers are formed in their definitive positions during the initial resist mask patterning step, rather than being created in a subsequent replacement step. This preliminary and direct formation eliminates the need for dummy structures and simplifies the manufacturing workflow while maintaining precision.
Data Source
AI summary
A semiconductor die includes a semiconductor substrate and a transistor array disposed over the semiconductor substrate. The transistor array includes unit cells and spacers. The unit cells are disposed along rows of the transistor array extending in a first direction and columns of the transistor array extending in a second direction perpendicular to the first direction. The spacers encircle the unit cells. The unit cells include source contacts and drain contacts separated by interlayer dielectric material portions. First sections of the spacers contacting the interlayer dielectric material portions are thicker than second sections of the spacers contacting the source contacts and the drain contacts.