Transistor Source/Drain Carbon Liners for Dopant Diffusion Control
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Solution Overview
Problem
As semiconductor devices continue to shrink in size, the out-diffusion of dopants from source/drain regions into adjoining channel regions becomes a significant challenge, leading to reduced channel mobility and device performance.
Innovation Solution
The use of epitaxially grown liner layers composed of a semiconductor material with a blocker element to reduce dopant out-diffusion, enhancing channel mobility and device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If source/drain regions are formed in scaled-down semiconductor devices, then integration density is improved, but dopant out-diffusion into channel regions increases
Solution Approach 1:
An epitaxial liner layer is introduced as an intermediary barrier between the source/drain regions and the channel region. This liner layer, composed of semiconductor material with a blocker element, selectively blocks dopant diffusion from the source/drain regions into the channel region while permitting carrier transport, thus resolving the contradiction between high integration density and maintained channel mobility
Solution Approach 2:
The liner layer is formed from composite semiconductor material incorporating a blocker element, combining the properties of semiconductor conductivity with dopant-blocking capability. This composite material structure enables simultaneous achievement of high integration density through scaling while preventing dopant out-diffusion that would degrade channel mobility
2Area of moving object
If feature sizes are reduced to increase integration density, then more components can be integrated, but dopant diffusion control becomes more difficult
Solution Approach 1:
The epitaxial liner layer is formed in advance during the epitaxial growth process, before dopant introduction into the source/drain regions. This preliminary formation of the barrier structure ensures precise dopant diffusion control from the outset, enabling reliable manufacturing even as feature sizes are reduced to increase integration density
Solution Approach 2:
The liner layer serves as a precisely controlled intermediary barrier that decouples the scaling process from dopant diffusion control issues, allowing feature size reduction without proportional degradation in dopant confinement
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The implementation of epitaxial liner layers effectively minimizes dopant diffusion, thereby increasing channel mobility and improving the performance of semiconductor devices.
Implementation Method 1
The liner layers include a semiconductor material that is composed of a blocker element, which helps reduce out-diffusion of dopants from the source/drain regions into adjoining channel regions
Implementation Method 2
epitaxially grown liner layers
Data Source
AI summary
In an embodiment, a device includes: a first nanostructure; a source/drain region adjoining a first channel region of the first nanostructure, the source/drain region including: a main layer; and a first liner layer between the main layer and the first nanostructure, a carbon concentration of the first liner layer being greater than a carbon concentration of the main layer; an inter-layer dielectric on the source/drain region; and a contact extending through the inter-layer dielectric, the contact connected to the main layer, the contact spaced apart from the first liner layer.