Transistor-Diode Region Layout for Lower Reverse Recovery Loss
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing reverse recovery loss due to high peak reverse recovery current and prolonged recovery time, primarily caused by excessive hole injection during the turn-off of the diode portion.
Innovation Solution
The semiconductor device incorporates a second transistor region with a smaller contact region area between the first transistor region and the boundary region, along with a low doping concentration second base region on the diode portion side, to suppress hole injection and enhance carrier annihilation, thereby reducing reverse recovery loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional diode structure is used, then the device structure is simple, but excessive hole injection occurs during turn-off causing high peak reverse recovery current and prolonged recovery time
Solution Approach 1:
The diode portion is segmented into multiple regions including a first base region, second base region, and third base region with different doping concentrations. This segmentation allows controlled hole injection and annihilation in each region, reducing peak reverse recovery current and recovery time while maintaining structural organization.
Solution Approach 2:
Different regions of the diode portion are assigned different doping concentrations: the first base region has a first doping concentration, the second base region has a second doping concentration lower than the first, and the third base region has a third doping concentration lower than the second. This local quality variation optimizes carrier annihilation at different locations, reducing reverse recovery loss.
2Power
If higher doping concentration is used in the base region, then the forward conduction is improved, but hole injection during turn-off increases causing longer recovery time
Solution Approach 1:
The doping concentration parameter is varied across different regions: the first base region has a higher doping concentration for good forward conduction, while the second and third base regions have progressively lower doping concentrations to facilitate rapid hole annihilation during turn-off, reducing recovery time.
Solution Approach 2:
The multi-region base structure is designed in advance to create a gradient doping profile that预先 prepares the carrier distribution. During turn-off, holes are annihilated progressively from the second base region to the third base region, accelerating the recovery process.
3Ease of manufacture
If a single base region with uniform doping is used, then the manufacturing process is simple, but carrier annihilation is insufficient leading to high peak reverse recovery current
Solution Approach 1:
The base region is divided into three segments with different doping concentrations, creating a gradient structure that enhances carrier annihilation efficiency. This segmentation can be implemented through sequential implantation or diffusion processes, balancing manufacturing feasibility with performance improvement.
Solution Approach 2:
Each base region (first, second, and third) is assigned a specific doping concentration tailored to its function: the first base region for forward conduction, the second for intermediate carrier control, and the third for rapid hole annihilation. This local optimization improves carrier annihilation efficiency while maintaining manufacturability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively minimizes peak reverse recovery current and shortens the recovery time, leading to reduced heat generation and improved operational efficiency.
Implementation Method 1
a first electrode has a Schottky barrier junction with the carrier suppression region
Data Source
AI summary
There is provided a semiconductor device in which the transistor portion has a first transistor region provided with the emitter region, the contact region, and the first base region; a second transistor region which is provided with the emitter region and the contact region and which is provided between the first transistor region and the diode portion; and a boundary region which includes the second base region and which is provided between the second transistor region and the diode portion, and at a front surface of the semiconductor substrate, an area of the contact region in the second transistor region is smaller than an area of the contact region in the first transistor region.


