Transistor Source/Drain Conductor Layout for Lower RC Delay

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Solution Overview

Problem

The miniaturization of integrated circuits poses challenges in design and manufacturing, particularly in managing stray capacitive couplings and RC delays due to conductor segment lengths, which affect performance and reliability.

Innovation Solution

The layout design of integrated circuits incorporates conductor segments with asymmetrical distances from power rails, achieved by adjusting the positions of terminal-conductor line cutting patterns to reduce conductor segment lengths, thereby minimizing stray capacitive couplings and RC delays.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conductor segment lengths are reduced to minimize stray capacitive couplings and RC delays, then speed performance is improved, but manufacturing precision requirements increase due to stricter design specifications

Engineering Contradiction:
Improvespeed performanceVSAvoiddesign specifications
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The patent applies asymmetry by positioning terminal-conductor line cutting patterns at different distances from the active region. Specifically, a first terminal-conductor line is positioned at a first distance from the active region while a second terminal-conductor line is positioned at a second distance, creating asymmetric conductor segment lengths. This asymmetric arrangement optimizes the balance between minimizing stray capacitive couplings and maintaining manufacturability, resolving the technical contradiction between speed performance and manufacturing precision.

Inventive Principle:
Principle #4Asymmetry

2Productivity

If terminal-conductor line cutting patterns are adjusted to reduce conductor segment lengths, then RC delays are minimized and circuit efficiency is improved, but device complexity increases due to asymmetric layout design

Engineering Contradiction:
Improvecircuit efficiencyVSAvoidlayout design
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies local quality by making specific local adjustments to terminal-conductor line positions rather than redesigning the entire layout. The first terminal-conductor line is positioned at a first distance from the active region while the second terminal-conductor line is positioned at a second distance, creating localized variations in conductor segment lengths. This approach minimizes RC delays and improves circuit efficiency in specific critical areas while maintaining overall layout simplicity, thus resolving the contradiction between productivity and device complexity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250328716A1Arrangement of source or drain conductors of transistor
Publication Date: 2025.10.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250328716A1 patent drawing
  • US20250328716A1 patent drawing
  • US20250328716A1 patent drawing

AI summary

An integrated circuit includes a first conductor segment and a second conductor segment which are separated at proximal edges by a first separation distance and aligned along a first terminal-conductor line. The first conductor segment and the second conductor segment correspondingly intersect a first active-region structure and a second active-region structure. A first vertical distance between a proximal edge of the first conductor segment and a first horizontal cell boundary is larger than a second vertical distance between a proximal edge of the second conductor segment and a second horizontal cell boundary by a first predetermined vertical distance which is a fraction of the first separation distance.