Transistor With Thin Insulation Film Reducing Mask Processes

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Solution Overview

Problem

The complexity of manufacturing electronic devices, such as display panels, is increased due to the need for numerous mask processes and the risk of back channel damage in transistor production, which complicates the achievement of high performance and miniaturization.

Innovation Solution

A transistor structure is developed with a second insulation film that separates the active layer from the source/drain electrodes, allowing for reduced mask processes, preventing back channel damage, and enabling miniaturization and improved device performance by using a thin film deposition method like MOCVD or ALD, which reduces parasitic capacitance and enhances process convenience.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional transistor manufacturing processes are used, then device performance can be maintained, but the number of mask processes increases and manufacturing complexity increases

Engineering Contradiction:
Improvenumber of mask processesVSAvoidmanufacturing process complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the etch stopper layer from the conventional transistor structure. By removing this intermediate layer, the manufacturing process requires fewer mask steps and etching processes, directly reducing manufacturing complexity while maintaining device performance through the spacer-based source/drain electrode positioning method

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The gate electrode structure is designed to serve multiple functions: it provides the primary gating function for transistor operation, acts as a reference for spacer formation, and enables self-aligned source/drain electrode positioning. This multi-functionality reduces the need for separate structural elements and simplifies the overall manufacturing process

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If etch stopper structure is used to prevent back channel damage, then device reliability improves, but device complexity and manufacturing steps increase

Engineering Contradiction:
Improveback channel damage preventionVSAvoidtransistor structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent removes the etch stopper layer entirely from the device structure. Instead of using this intermediate protective layer, the invention relies on the spacer structures to define the source/drain electrode positions, which inherently prevents back channel damage during the etching process by providing self-alignment and physical barriers

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The spacer structures serve as intermediary elements that replace the etch stopper's protective function. These spacers are formed on the gate electrode and actively define the boundaries for source/drain electrode deposition, preventing damage to the back channel during subsequent etching steps while enabling precise device geometry control

Inventive Principle:
Principle #24Intermediary (Mediator)

3Area of moving object

If transistor size is reduced for miniaturization, then device density increases, but parasitic capacitance and manufacturing precision requirements increase

Engineering Contradiction:
Improvetransistor areaVSAvoidetching precision
Core Design Contradiction:
Area of moving objectVSManufacturing precision

Solution Approach 1:

The patent forms the spacer structures on the gate electrode before depositing the source/drain electrodes. This preliminary action establishes precise alignment references that guide subsequent material deposition and etching steps, enabling accurate feature definition even at reduced transistor dimensions without requiring excessively precise etching

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The spacer structures are self-aligned to the gate electrode through conformal deposition, automatically defining the source/drain electrode positions relative to the gate. This self-alignment mechanism eliminates the need for separate alignment steps and reduces cumulative alignment errors, enabling miniaturization with maintained manufacturing precision

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution simplifies the manufacturing process, prevents back channel damage, and allows for the creation of smaller transistors with improved performance and reduced parasitic capacitance, facilitating the production of high-performance electronic devices.

Implementation Method 1

a second insulation film disposed on the active layer and the first insulation film to cover the active layer, the second insulation film having a thickness smaller than a thickness of the first insulation film

Methodology Applied
Scientific EffectThin film deposition: Physical Vapour Deposition

Implementation Method 2

The second insulation film may be formed by a thin film deposition method capable of thin film deposition control such as MOCVD (Metal-Organic Chemical Vapor Deposition) or ALD (Atomic Layer Deposition)

Methodology Applied
Scientific EffectMOCVD: Chemical Vapour Deposition

Implementation Method 3

The second insulation film may be formed by a thin film deposition method capable of thin film deposition control such as MOCVD (Metal-Organic Chemical Vapor Deposition) or ALD (Atomic Layer Deposition)

Methodology Applied
Scientific EffectALD: Physical Vapour Deposition

Data Source

PatentUS11476281B2Transistor and electronic device
Publication Date: 2022.10.18 LG DISPLAY CO LTD
  • US11476281B2 patent drawing
  • US11476281B2 patent drawing
  • US11476281B2 patent drawing

AI summary

An electronic device comprises a panel, a driving circuit configured to drive the panel, and a transistor disposed in the panel. The transistor includes a first insulation film on a substrate, an active layer disposed on the first insulation film, a second insulation film disposed on the active layer and the first insulation film to cover the active layer, the second insulation film having a thickness smaller than a thickness of the first insulation film, a source electrode disposed on the second insulation film and spaced apart from the active layer by the second insulation film, the source electrode overlapping an end of the active layer, and a drain electrode disposed on the second insulation film and spaced apart from the active layer by the second insulation film, the drain electrode overlapping another end of the active layer.