Transmission Gate Layout Using Four Metal-Zero Tracks
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Solution Overview
Problem
Integrated circuits (ICs) face challenges in designing transmission gates with lower profiles that can be integrated into circuit layouts using fewer metal zero tracks while maintaining effective current control between PMOS and NMOS transistors.
Innovation Solution
The design incorporates first and second PMOS transistors, first and second NMOS transistors, and conductive paths between their gates and source-drain terminals, with at least one conductive path including a segment perpendicular to the metal zero segments, arranged using a total of four metal zero tracks to reduce profile height and enable integration in four-track cell heights.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If transmission gates are designed with conventional metal zero track arrangements, then effective current control between PMOS and NMOS transistors is maintained, but the profile height increases and integration capability is reduced
Solution Approach 1:
The patent reconfigures the transmission gate layout by introducing perpendicular conductive paths relative to the metal zero segments, transitioning from a conventional linear arrangement to a multi-dimensional spatial configuration. This dimensional change allows the transmission gate to fit within four metal zero tracks while maintaining functional integrity, thereby reducing profile height without sacrificing integration capability.
2Reliability
If more metal zero tracks are used, then better current control is achieved, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent merges the functions of multiple metal zero tracks into a compact four-track configuration by strategically positioning conductive paths that serve multiple purposes simultaneously. The perpendicular conductive paths enable current control functionality that would traditionally require more tracks, thereby reducing device complexity while maintaining current control effectiveness.
3Area of stationary object
If conventional transmission gate layouts are used, then ease of manufacture is maintained, but the profile height is larger and occupies more space
Solution Approach 1:
The patent segments the transmission gate structure into distinct functional regions defined by the perpendicular conductive paths and metal zero segments. This segmentation allows for modular manufacturing processes where each segment can be fabricated and connected systematically, maintaining manufacturing simplicity while achieving compact space occupation.
Data Source
AI summary
A transmission gate structure includes first and second PMOS transistors positioned in a first active area, first and second NMOS transistors positioned in a second active area parallel to the first active area, and four metal segments parallel to the active areas. A first metal segment overlies the first active area, a fourth metal segment overlies the second active area, and second and third metal segments are a total of two metal segments positioned between the first and fourth metal segments. A first conductive path connects gates of the first PMOS and NMOS transistors, a second conductive path connects gates of the second PMOS and NMOS transistors, a third conductive path connects a source/drain (S/D) terminal of each of the first and second PMOS transistors and first and second NMOS transistors and includes a first conductive segment extending across at least three of the four metal segments.