Transparent Core Substrate Stacking to Reduce RDL Warpage
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Solution Overview
Problem
The increasing density of redistribution layers on core substrates in semiconductor packaging leads to warpage during manufacturing processes, resulting in defective products and reduced yield.
Innovation Solution
The use of a transparent core substrate with a first and second transparent core layer, where the second layer is bonded to the first layer to form through holes with overlapping sub-through holes, and a buffer layer is disposed within the through holes to mitigate warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the density of the redistribution layer on the core substrate is increased, then the performance of semiconductor chips is improved, but the core substrate is prone to warpage during manufacturing processes
Solution Approach 1:
The core substrate is divided into multiple transparent core layers (first transparent core layer and second transparent core layer) stacked together. This segmentation allows the substrate to better distribute and manage the stress from high-density redistribution layers, preventing warpage while maintaining the ability to support increased chip performance requirements.
Solution Approach 2:
The patent employs a composite structure consisting of multiple transparent core layers with different properties. Each layer can be optimized for specific functions, and their combination creates a substrate that resists warpage better than a single-layer substrate, while still supporting high-density redistribution layer configurations.
2Adaptability or versatility
If the number of layers within the redistribution layer is increased, then the functionality of semiconductor chips is improved, but the core substrate becomes more prone to warpage
Solution Approach 1:
By segmenting the core substrate into multiple transparent core layers, the patent creates a structure that can accommodate the increased complexity and weight of multi-layer redistribution layers. Each core layer provides structural support, maintaining substrate stability even as chip functionality increases through additional redistribution layers.
Solution Approach 2:
The patent transitions from a single-plane substrate to a multi-layer stacked substrate structure. This dimensional change allows the substrate to better handle the vertical stacking of multiple redistribution layers, maintaining stability while enabling increased chip functionality through three-dimensional integration.
3Ease of manufacture
If a single transparent core layer is used, then the manufacturing process is simpler, but the stiffness of the substrate is insufficient to prevent warpage
Solution Approach 1:
The substrate is segmented into multiple transparent core layers that are bonded together. This segmentation increases the overall stiffness and strength of the substrate to prevent warpage, while the bonding process and layer alignment are designed to maintain manufacturing simplicity and not significantly complicate the fabrication process.
Data Source
AI summary
An electronic device includes a transparent core substrate and a first buffer layer. The transparent core substrate includes a through hole, wherein the transparent core substrate includes a first transparent core layer and a second transparent core layer. The first transparent core layer includes a first sub-through hole. The second transparent core layer is bonded to the first transparent core layer, wherein the second transparent core layer includes a second sub-through hole, and the first sub-through hole overlaps the second sub-through hole to form the through hole. The first buffer layer is disposed in at least a part of the through hole.