Trap-Rich Substrate Structure With Floating Low-Resistivity Region
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Solution Overview
Problem
BiCMOS integration on high resistivity semiconductor substrates faces compatibility issues among different devices, leading to low yields and device-to-device leakage, which are not effectively addressed by existing technologies.
Innovation Solution
A semiconductor structure is developed with a high resistivity substrate and a low resistivity region floating beneath active devices, incorporating trap rich regions to enhance radiation hardness and reduce device leakage, using semiconductor-on-insulator technology and implantation processes to form non-single-crystal and low resistivity regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If BiCMOS integration is performed on high resistivity semiconductor substrates, then radiation hardness and device performance are improved, but device-to-device leakage increases and manufacturing yield decreases
Solution Approach 1:
The patent applies local quality by creating distinct regions with different resistivity characteristics within the semiconductor substrate. Specifically, high resistivity regions are formed beneath certain devices to enhance radiation hardness and reduce leakage, while low resistivity regions are created beneath other devices to improve carrier collection and reduce parasitic effects. This spatial differentiation of electrical properties allows each device type to operate in its optimal electrical environment, resolving the contradiction between reducing leakage and maintaining radiation hardness.
Solution Approach 2:
The patent utilizes parameter changes by varying the resistivity of the semiconductor substrate through controlled ion implantation processes. By adjusting implantation energy, dose, and species, the patent creates regions with precisely controlled resistivity values. This enables dynamic optimization of electrical characteristics for different device types on the same substrate, allowing the system to achieve both low leakage and high radiation hardness by matching substrate parameters to specific device requirements.
2Reliability
If different parameters are used for different devices on the same substrate, then device performance is optimized, but manufacturing complexity and yield loss increase
Solution Approach 1:
The patent applies segmentation by dividing the semiconductor substrate into distinct functional zones with different electrical characteristics. Through selective ion implantation, the substrate is segmented into high resistivity regions, low resistivity regions, and intermediate regions, each tailored for specific device types. This segmentation allows independent optimization of device parameters while using a unified substrate platform, reducing overall manufacturing complexity compared to using entirely separate substrates for different device types.
Solution Approach 2:
The patent achieves universality by creating a multi-functional semiconductor substrate that can support multiple device types with different electrical requirements on the same substrate. The substrate structure, with its spatially varying resistivity regions, serves multiple functions simultaneously: providing mechanical support, establishing electrical isolation for some devices, enhancing carrier collection for others, and providing radiation hardness throughout. This multi-functionality eliminates the need for separate substrates or complex post-processing steps, thereby reducing manufacturing complexity while maintaining optimized performance for all device types.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure maintains high NPN yield and reduces device-to-device leakage while preserving BEOL passive device and RF FET performance, offering radiation hardening benefits.
Implementation Method 1
a low resistivity region floating in the high resistivity semiconductor substrate and which is below the active device
Implementation Method 2
incorporating trap rich regions to enhance radiation hardness and reduce device leakage, using semiconductor-on-insulator technology and implantation processes
Data Source
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to a substrate with trap rich and low resistivity regions and methods of manufacture. The structure includes: a high resistivity semiconductor substrate; an active device over the high resistivity semiconductor substrate; and a low resistivity region floating in the high resistivity semiconductor substrate and which is below the active device.