Trapezoidal Conductor Circuits for Printed Wiring Board Stress Relief
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Solution Overview
Problem
Existing multilayer printed wiring boards face challenges in connection reliability due to stress on through-hole conductors, particularly at the interfaces between via holes and conductor circuits, leading to potential peeling issues during heat cycles.
Innovation Solution
The design incorporates a core substrate with alternating conductor and resin insulating layers, featuring trapezoidal cross-sectional conductor circuits and varying roughness levels on resin insulating layers, which helps in distributing stress and enhancing connection reliability through strategic base angle and roughness configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional multilayer printed wiring boards are used with standard conductor layer configurations, then manufacturing is simpler, but connection reliability deteriorates due to stress on through-hole conductors at interfaces with conductor circuits
Solution Approach 1:
The conductor layers are segmented into different types (first conductor layer with via holes, second conductor layer without via holes, third conductor layer with conductor circuits) distributed across multiple build-up layers. This segmentation allows stress to be distributed across different structural configurations rather than concentrated at single interfaces, improving connection reliability while managing complexity through systematic layer differentiation.
Solution Approach 2:
Different conductor layers are assigned different local qualities: the first conductor layer has via holes for vertical connectivity, the second conductor layer provides stress-relieved horizontal connectivity without via holes, and the third conductor layer contains conductor circuits. This local differentiation optimizes each layer's function to collectively improve connection reliability.
2Productivity
If conductor circuits are made finer to increase wiring density, then wiring density improves, but manufacturing precision requirements worsen due to smaller minimum circuit widths and spaces
Solution Approach 1:
The patent transitions from planar conductor circuits to three-dimensional trapezoidal conductor circuits with inclined side surfaces. This dimensional change allows the conductor circuits to accommodate finer pitch while maintaining manufacturability, as the trapezoidal shape provides better stress distribution and easier formation through plating processes compared to traditional rectangular cross-sections.
Solution Approach 2:
The conductor circuits are designed with specific parameter ranges: minimum circuit width of 5μm or more, minimum space width of 5μm or more, and base angles between 45-60 degrees. These parameter changes enable finer wiring density while maintaining manufacturing precision by optimizing the geometric characteristics for both high-density routing and manufacturable dimensions.
3Strength
If resin insulating layers are made smoother to improve conductor adhesion, then adhesion improves, but stress distribution worsens due to reduced surface area for stress absorption
Solution Approach 1:
The resin insulating layers are designed with predetermined roughness (rz ≥ 1.5μm) to beforehand cushion and absorb thermal expansion stress. This pre-engineered surface roughness creates micro-cushioning zones that absorb stress during heat cycles, preventing stress concentration at conductor interfaces while maintaining sufficient adhesion strength.
Solution Approach 2:
The resin insulating layers are optimized with specific parameter ranges: roughness rz of 1.5-5.0μm and thickness of 5-20μm. These parameter changes simultaneously achieve both good adhesion (through sufficient roughness) and effective stress distribution (through controlled roughness and adequate thickness), resolving the contradiction between adhesion strength and stress distribution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the likelihood of conductor peeling by effectively managing stress distribution and maintaining connection reliability even under thermal stress, while allowing for finer conductor circuits and increased wiring density.
Implementation Method 1
Each of the first and second conductor layers, inner side first and second conductor layers and outermost first and second conductor layers includes a metal foil, a seed layer formed on the metal foil, and an electrolytic plating film formed on the seed layer
Data Source
AI summary
A printed wiring board includes: a core substrate having a core layer, first and second conductor layers, and through-hole conductors penetrating through the core layer and connecting the conductor layers; and first and second build-up layers each including an insulating layer, an inner side conductor layer, an outermost insulating layer, an outermost conductor layer, and a solder resist layer. Each of the conductor layers includes conductor circuits having substantially a trapezoid cross-sectional shape, and spaces between adjacent conductor circuits, and includes a metal foil, a seed layer, and an electrolytic plating film. The inner side conductor layers have the smallest minimum circuit width, the smallest minimum space width and the largest base angle among the conductor layers. The insulating layers have the smallest ten-point average roughness rz3, rz7 among the ten-point average roughness rz3, rz7, rz1, rz2, rz5 and rz9 of the core layer, insulating layers and outermost insulating layers.