Semiconductor Transport Tray Projections Prevent Adhesion
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Solution Overview
Problem
The existing method of transporting semiconductor chips using trays faces challenges due to static electricity, where chips tend to adhere to the back surface of upper-stage trays, making them difficult to remove or inspect, especially with the increasing lightness of chips and the adhesiveness of resin films.
Innovation Solution
The solution involves arranging projections on the back surface of upper-stage trays that are insufficient in height to contact the chips, and forming fitting second accommodating portions on the back surface to prevent adhesion, while also ensuring the projections on the main surface are designed to reduce contact with the chips during stacking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a dull (rough surface) finish treatment is applied to the accommodating portions of the back surface of the upper-stage tray, then the adhesion of semiconductor chips is reduced, but the semiconductor chips still tend to adhere due to static electricity, especially with lighter chips and adhesive resin films
Solution Approach 1:
The invention applies a localized quality change by forming projections only in specific regions of the accommodating portion on the back surface of the upper-stage tray. These projections create localized contact points that prevent adhesion without requiring the entire surface to be roughened, thus addressing the adhesion problem while maintaining manufacturing feasibility.
Solution Approach 2:
The invention changes the surface topology parameter by introducing projections with specific height and spacing characteristics. This parameter change transforms the flat back surface into a structured surface that disrupts static electricity accumulation and prevents chip adhesion, especially effective for lighter chips with adhesive resin films.
2Object-affected harmful factors
If projections are formed over the back surface of the upper-stage tray to prevent adhesion, then chip adhesion is reduced, but the projections may contact and damage the semiconductor chips
Solution Approach 1:
The invention carefully controls the height parameter of the projections, ensuring they are tall enough to prevent chip adhesion by disrupting static electricity fields, but short enough to avoid contacting and damaging the semiconductor chips during normal handling and transport operations.
Solution Approach 2:
The projections are strategically positioned in specific regions of the accommodating portion, creating localized prevention zones that address adhesion without requiring comprehensive coverage that would increase the risk of chip contact and damage.
3Weight of moving object
If the semiconductor chips are made lighter and thinner to reduce weight, then the weight of the semiconductor device is reduced, but the chips become more susceptible to adhesion due to increased adhesiveness of resin films
Solution Approach 1:
The invention addresses the adhesion issue caused by lighter, thinner chips by modifying the tray surface parameters - specifically introducing projections that disrupt the contact between the chip and tray surface, thereby preventing static electricity-induced adhesion that disproportionately affects lighter chips with adhesive resin films.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents semiconductor chips from adhering to the trays, allowing for smooth handling and inspection, even with thin and lightweight chips, by minimizing contact areas and reducing static electricity influence.
Implementation Method 1
the semiconductor chip tends to adhere to the back surface of the upper-stage tray due to the action of static electricity
Data Source
AI summary
To prevent semiconductor chips from adhering to the trays during transport, a method is employed which transports semiconductor chips in the following state. When trays provided with a plurality of accommodating portions having a recessed cross section for accommodating semiconductor chips on a main surface thereof are stacked in a plurality of stages, the semiconductor chips are accommodated in spaces defined by the accommodating portions formed over the main surface of the lower-stage tray and corresponding accommodating portions formed over the back surface of the upper-stage tray. Here, on bottom surfaces of the accommodating portions formed over the back surface of the upper-stage tray, isolated projections having a height which prevents the projections from coming into contact with the semiconductor chips are arranged in a scattered manner. In this way, it is possible to prevent the semiconductor chips from adhering to the back surface of the upper-stage tray.


