Trench Diode Formation for Planar Power MOSFETs
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Solution Overview
Problem
Conventional surface-formed Zener diodes in power semiconductor devices pose challenges due to additional poly deposition and masking requirements, surface topology issues, and step coverage problems during metal deposition, which complicate miniaturization and pattern formation.
Innovation Solution
A trench diode is formed in an epi layer during gate polysilicon formation, with a P-N junction defined within a trench in a substrate material, using a first semiconductor material with a high doping concentration and a second semiconductor material of opposite conductivity type, eliminating the need for additional poly deposition and masking, and ensuring co-planarity with the gate structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional surface-formed Zener diode is used, then ESD protection function is provided, but additional poly deposition and masking implantation processes are required
Solution Approach 1:
The patent combines the formation of the trench diode with the gate structure formation process. The same trench etching, insulating layer deposition, and polysilicon filling steps are used for both the gate structure and the trench diode, eliminating the need for separate poly deposition and masking implantation processes that were required in conventional surface-formed Zener diodes.
Solution Approach 2:
The trench structure serves multiple functions: it forms both the gate structure of the MOSFET and the body region of the trench diode. The insulating layer and polysilicon material used in gate formation simultaneously create the necessary structures for both devices, making the process universally applicable to both functions.
2Reliability
If a conventional surface-formed Zener diode is formed over the trench MOSFET, then ESD protection is achieved, but surface topology becomes complex making lithography patterning difficult
Solution Approach 1:
The patent moves the diode structure from the surface dimension to the vertical dimension by forming it within the trench. This dimensional change allows the diode to be formed in the depth of the substrate rather than adding height at the surface, maintaining a planar surface topology that is compatible with standard lithography patterning processes.
3Reliability
If a conventional surface-formed Zener diode with added height is used, then ESD protection function is provided, but step coverage issues occur during multiple metal deposition processes
Solution Approach 1:
By forming the diode within the trench structure rather than on the surface, the patent eliminates the height addition problem. The diode structures (body region and contact) are formed at or near the surface level, maintaining a flat topology that allows uniform metal deposition without step coverage issues during subsequent metallization processes.
4Ease of manufacture
If additional poly deposition and masking processes are performed for surface-formed Zener diode, then diode structure is formed, but manufacturing time and cost increase
Solution Approach 1:
The patent merges the diode structure formation with the gate structure formation processes. The trench etching, insulating layer deposition, and polysilicon filling steps are performed once to create both structures simultaneously, eliminating the need for additional separate processing steps that would increase manufacturing time and cost.
Data Source
AI summary
A method for forming a trench diode for a power semiconductor device includes forming a first trench having a first opening and a second trench having a second opening in a substrate material, the second opening of the second trench being wider than the first opening of the first trench. An insulating layer is formed over surfaces of the first and second trenches. A first semiconductor material is provided within the first and second trenches, the first semiconductor material filling the first trench at least until the first opening is entirely plugged and partially filling the second trench so that a portion of the second opening remains open, the first semiconductor material having a first conductivity type. A second semiconductor material is provided within the second trench and over the first semiconductor material, the second semiconductor material having a second conductivity type that is different from the first conductivity type.