Trench Floating Gate EEPROM Cell Size Reduction
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Solution Overview
Problem
Conventional EEPROMs face challenges in further reducing cell size to increase nonvolatile memory capacity and downsizing, as existing structures require planar space for tunnel windows, which limits miniaturization and increases manufacturing complexity.
Innovation Solution
The semiconductor device incorporates a trench structure with a floating gate opposed to the side surface of the trench, eliminating the need for a planar tunnel window and allowing for reduced cell size, simplified manufacturing by eliminating the need for resist patterns, and improved capacitance coupling ratios through a layered insulating film configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If a planar tunnel window structure is used in conventional EEPROMs, then the device can achieve nonvolatile memory functionality, but the cell size cannot be further reduced due to the requirement of planar space for tunnel windows
Solution Approach 1:
The patent transitions from a planar tunnel window structure to a three-dimensional trench structure. The floating gate is positioned within a trench dug downward from the semiconductor layer surface, allowing the tunnel window to be formed on the side surface of the trench rather than requiring planar space. This vertical dimension utilization enables significant cell size reduction while maintaining memory functionality.
Solution Approach 2:
The floating gate is nested within the trench structure, with the tunnel window formed on the trench side surface. The control gate surrounds the floating gate in a nested configuration, with the control gate embedded in the trench and the floating gate positioned against the trench side wall. This nested arrangement maximizes spatial efficiency and reduces overall cell footprint.
2Ease of manufacture
If a planar tunnel window structure is used, then the device can store data, but manufacturing complexity increases due to the need for resist patterns and additional manufacturing steps
Solution Approach 1:
The patent extracts the tunnel window from the planar surface and relocates it to the vertical side surface of the trench. This extraction eliminates the need for complex resist pattern formation that would be required for planar tunnel windows, simplifying the manufacturing process. The trench structure itself defines the tunnel window location, reducing the number of discrete manufacturing steps.
3Area of moving object
If the floating gate is positioned against the side surface of the trench, then cell size is reduced, but the coupling ratio between floating gate and control gate must be maintained
Solution Approach 1:
The patent applies local quality by forming the insulating film with varying thickness in different regions. The insulating film is thinner at the trench bottom and thicker toward the top, creating optimal electrical coupling between the floating gate and control gate at the trench side surface while maintaining adequate insulation elsewhere. This localized thickness variation ensures reliable coupling ratio without compromising cell miniaturization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables a significant reduction in cell size, reduces manufacturing steps and costs, and enhances the coupling ratio between the floating gate and control gate, facilitating efficient data storage and retrieval with improved voltage levels.
Implementation Method 1
a first insulating film formed on the bottom surface and the side surface of the trench; a floating gate stacked on the first insulating film and opposed to the bottom surface and the side surface of the trench through the first insulating film
Data Source
AI summary
A semiconductor device includes a semiconductor layer with a trench dug downward from its surface, a source region formed on a surface layer portion adjacent to a first side of the trench in a prescribed direction, a drain region formed on the surface layer portion, adjacent to a second side of the trench opposite to the first side in the prescribed direction, a first insulating film on the bottom surface and the side surface of the trench, a floating gate stacked on the first insulating film and opposed to the bottom surface and the side surface of the trench through the first insulating film, a second insulating film formed on the floating gate, and a control gate at least partially embedded in the trench so that the portion embedded in the trench is opposed to the floating gate through the second insulating film.