Trench-Formed Gate Line for Low Resistance Signal Transmission
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Solution Overview
Problem
As LCD panels increase in size and resolution, signal delay issues arise due to long gate and data lines, which can be mitigated by using thicker lines or low-resistance metals, but these solutions are limited by the availability of low-resistance metals and the difficulty in manufacturing without altering their inherent properties, and result in pattern defects from step differences.
Innovation Solution
A display substrate with thicker gate lines formed in a sub-trench and opening portion on an insulation substrate, using a planarization layer and dry-etching process to create a stable structure, reducing line resistance and enhancing manufacturing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate line thickness is increased to reduce signal delay, then the resistance decreases, but step difference between the gate pattern and base substrate increases causing data patterns to be cut at the side wall
Solution Approach 1:
The gate line is formed in a trench structure that extends in the vertical dimension below the base substrate surface. This allows the gate line to have increased effective thickness for lower resistance while the trench walls provide lateral support to prevent data pattern cutting, thus resolving the contradiction between thickness increase and pattern formation precision.
Solution Approach 2:
The gate line is nested within the trench structure, which is formed in the base substrate. This nesting provides mechanical support from the trench walls to prevent data pattern cutting at the gate line side walls, while allowing the gate line to maintain increased thickness for reduced resistance.
2Reliability
If low resistance metal is used to form the gate line, then the resistance decreases, but the manufacturing process becomes more complex due to limited material options and process control difficulties
Solution Approach 1:
The patent changes the geometric parameter of the gate line by forming it in a trench structure, increasing its effective thickness and cross-sectional area. This reduces resistance without requiring a change in material composition or additional low resistance metal layers, thereby simplifying the manufacturing process while maintaining signal transmission reliability.
3Reliability
If the gate line thickness is increased to overcome signal delay, then the resistance decreases, but the inherent properties of the metal material become difficult to control during manufacturing
Solution Approach 1:
Instead of increasing thickness in the vertical direction only, the gate line is formed in a trench that provides lateral confinement. This allows for increased effective cross-sectional area and reduced resistance while maintaining better control over the metal deposition process and material properties during manufacturing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces signal line resistance and stabilizes the structure, preventing pattern defects and enhancing the reliability of subsequent manufacturing processes.
Implementation Method 1
The sub-trench is formed by dry-etching the planarization layer and the insulation substrate by using an etching gas
Data Source
AI summary
A display substrate having a low resistance signal line and a method of manufacturing the display substrate are provided. The display substrate includes an insulation substrate, a gate line, a data line and a pixel electrode. The gate line gate line is formed through a sub-trench and an opening portion. The sub-trench is formed in the insulation substrate and the opening portion is formed through a planarization layer on the insulation substrate at a position corresponding to the position of the sub-trench. The data line crosses the gate line. The pixel electrode is electrically connected to the gate line and the data line through a switching element. Thus, a signal line is formed through a trench formed by using a planarization layer and an insulation substrate, so that a resistance of the signal line may be reduced.