Trench-Gate MISFET Structure for Higher Withstand Voltage

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Solution Overview

Problem

Existing semiconductor devices with trench gate structures face challenges in maintaining high withstand voltage due to electric field concentration and punch-through issues, which affect the reliability and performance of common source/drain type MISFETs.

Innovation Solution

The semiconductor device incorporates a trench gate structure with a high concentration channel region and a p-type base region, where the high concentration channel region prevents depletion layer overlap and punch-through, and the p-type base region has a concentration gradient to reduce electric field strength between the gate electrode and source/drain regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a trench gate structure is used in a common source/drain type MISFET, then the device integration is improved, but electric field concentration occurs between the gate electrode and source/drain regions, reducing withstand voltage

Engineering Contradiction:
Improvedevice integrationVSAvoidwithstand voltage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by creating a concentration gradient in the p-type base region, where the impurity concentration varies from the main surface toward the deep interior. This gradient structure locally modifies the electric field distribution, reducing field concentration at critical interfaces while maintaining the trench gate configuration for device integration.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the impurity concentration parameter of the p-type base region by forming a concentration gradient. This parameter modification alters the electric field distribution characteristics, enabling the device to maintain high integration with trench gates while improving withstand voltage through reduced electric field concentration.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If the trench gate structure is formed with standard configuration, then manufacturing is simplified, but punch-through occurs between drift regions, affecting device reliability

Engineering Contradiction:
Improvetrench gate fabricationVSAvoidpunch-through resistance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies local quality by forming a high concentration channel region at specific locations within the p-type base region. This localized high concentration zone prevents punch-through between drift regions while maintaining the overall simplicity of the trench gate structure, thus preserving ease of manufacture while improving reliability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies preliminary action by pre-forming the concentration gradient in the p-type base region before final device operation. This preliminary structural preparation ensures that punch-through is prevented from occurring in the first place, while the trench gate structure remains relatively simple to manufacture.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively suppresses electric field concentration and punch-through, thereby enhancing the withstand voltage and reliability of the semiconductor device.

Implementation Method 1

the high concentration channel region prevents depletion layer overlap and punch-through

Methodology Applied
Scientific EffectDepletion layer: Electric Field

Implementation Method 2

reduce electric field strength generated between the gate electrode and source/drain regions

Methodology Applied
Scientific EffectElectric field concentration: Electric Field

Data Source

PatentUS12100764B2Semiconductor device
Publication Date: 2024.09.24 ROHM CO LTD
  • US12100764B2 patent drawing
  • US12100764B2 patent drawing
  • US12100764B2 patent drawing

AI summary

A semiconductor device includes a semiconductor layer that has a main surface, a trench gate structure that includes a trench formed in the main surface and having a first sidewall at one side, a second sidewall at the other side and a bottom wall in a cross-sectional view, an insulation layer formed on an inner wall of the trench, and a gate electrode embedded in the trench with the insulation layer between the trench and the gate electrode and having an upper end portion positioned at a bottom-wall side with respect to the main surface, a plurality of first-conductivity-type drift regions that are respectively formed in a region at the first sidewall side of the trench and in a region at the second sidewall side of the trench such as to face each other with the trench interposed therebetween in a surface layer portion of the main surface and that are positioned in a region at the main surface side with respect to the bottom wall, and a plurality of first-conductivity-type source/drain regions that are formed in surface layer portions of the plurality of drift regions, respectively.